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| 型号： | THS1031IDWRG4 |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | ADC |
| 英文描述： | 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28 |
| 封装： | GREEN, PLASTIC, SOIC-28 |
| 文件页数： | 27/42页 |
| 文件大小： | 730K |
| 代理商： | THS1031IDWRG4 |
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THS1031
3-V TO 5.5-V, 10-BIT, 30 MSPS
CMOS ANALOG-TO-DIGITAL CONVERTER
SLAS242E – NOVEMBER 1999 – REVISED MARCH 2002
33
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
clamp acquisition time (continued)
For example, consider clamping an incoming video signal that has a black level near 0.3 V to a black level of
1.3 V at the THS1031 input. The voltage Vc required across the input coupling capacitor is thus 1.3 – 0.3 = 1 V.
If a 10 mV or less clamp voltage error Ve will give acceptable system operation, if the source resistance Rin is
20
and the coupling capacitor CIN is 1 F, then the total clamp pulse duration required to reach this error is:
t
ACQ +
C
IN
R
IN
In
Vc
Ve
+ 1 mF
20
W
In
1
0.01
= 92
s (approximately)
Note that SW1 does not have to be closed continuously until the desired clamp voltage is achieved. The clamp
level can be acquired over a longer interval by using a series of shorter clamp pulses with total pulse duration
at least equal to the acquisition time calculated using equation 19.
droop
The charge pulses entering or leaving AIN caused by the sample and hold switched capacitor input can charge
or discharge CIN, causing the voltage at AIN to drift toward VM (the average of REFTS and REFBS) during the
time between clamp pulses. This effect is called clamp droop and can be seen as a slow change in the ADC
output code when the input signal is a constant dc level. Through careful clamp circuit design, this droop can
be kept below 1 LSB, giving no change in the ADC output between clamp pulses.
The clamp voltage droop is a function of the input current to the THS1031 and the time between clamp pulses,
td
V
DROOP +
I
IN
C
IN
td (approximately)
Where:
I
IN +
(V
AIN
– VM)
2
R
AIN
+ (V
AIN – VM)
CS
fclk
2
RAIN is the input resistance given by equation 20. Cs is approximately 2.5 pF. Substituting IIN into the droop
voltage equation gives
V
DROOP +
(V
AIN – VM)
CS
td
(2
C
IN)
Note that IIN has maximum value when VAIN is either +FS or –FS, and so the droop rate is worst then the clamp
level is near either full-scale input voltage. There is no droop when the clamp level equals VM because IIN is
zero. Note that the actual voltage droop may be up to 50% more than given by equation 22 when allowing for
temperature variations and device to device processing variations.
For example, with CIN = 1 F at fclk = 30 MSPS conversion rate in top/bottom mode with REFTS = 2.5 V and
REFBS = 0.5 V, the clamp droop over td = 63.5 ms when VAIN = +FS is
V
DROOP +
(V
AIN – VM)
CS
fclk
td
(2
C
IN)
+ (2.5 V – 1.5 V)
2.5 pF
30 MMz
2
+ 0.0024 mV
+ 1.25 LSB (assuming PGA gain + 1)
(20)
(21)
(22)
(23)
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相关代理商/技术参数 |
参数描述 |
|---|---|
| THS1031IPW | 功能描述:模数转换器 - ADC _ RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| THS1031IPWG4 | 功能描述:模数转换器 - ADC 10B 30 MSPS ADC Sgl Ch. Integ. Pgmable RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| THS1031IPWR | 功能描述:模数转换器 - ADC 10-Bit 30 MSPS 1-Ch RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| THS1031IPWRG4 | 功能描述:模数转换器 - ADC 10-Bit 30 MSPS 1-Ch RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| THS1031SOIC | 制造商:TI 制造商全称:Texas Instruments 功能描述:2.7 V . 5.5 V, 10-BIT, 30 MSPS CMOS ANALOG-TO-DIGITAL CONVERTER |
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