参数资料
型号: TLC080CP
厂商: Texas Instruments, Inc.
英文描述: FAMILY OF WIDE-BANDWIDTH HIGH-OUTPUT-DRIVE SINGLE SUPPLY OPERATIONAL AMPLIFIERS
中文描述: 家庭具有宽带高输出驱动单电源运算放大器
文件页数: 21/52页
文件大小: 1462K
代理商: TLC080CP
SLOS254D JUNE 1999 REVISED FEBRUARY 2004
21
WWW.TI.COM
APPLICATION INFORMATION
shutdown function
Three members of the TLC08x family (TLC080/3/5) have a shutdown terminal (SHDN) for conserving battery
life in portable applications. When the shutdown terminal is tied low, the supply current is reduced to 125
μ
A/channel, the amplifier is disabled, and the outputs are placed in a high-impedance mode. To enable the
amplifier, the shutdown terminal can either be left floating or pulled high. When the shutdown terminal is left
floating, care should be taken to ensure that parasitic leakage current at the shutdown terminal does not
inadvertently place the operational amplifier into shutdown. The shutdown terminal threshold is always
referenced to the voltage on the GND terminal of the device. Therefore, when operating the device with split
supply voltages (e.g.
±
2.5 V), the shutdown terminal needs to be pulled to V
DD
(not system ground) to disable
the operational amplifier.
The amplifier’s output with a shutdown pulse is shown in Figures 43 and 44. The amplifier is powered with a
single 5-V supply and is configured as noninverting with a gain of 5. The amplifier turnon and turnoff times are
measured from the 50% point of the shutdown pulse to the 50% point of the output waveform. The times for the
single, dual, and quad are listed in the data tables.
Figures 37, 38, 39, and 40 show the amplifier’s forward and reverse isolation in shutdown. The operational
amplifier is configured as a voltage follower (A
V
= 1). The isolation performance is plotted across frequency
using 0.1 V
PP
, 2.5 V
PP
, and 5 V
PP
input signals at
±
2.5 V supplies and 0.1 V
PP
, 8 V
PP
, and 12 V
PP
input signals
at
±
6 V supplies.
circuit layout considerations
To achieve the levels of high performance of the TLC08x, follow proper printed-circuit board design techniques.
A general set of guidelines is given in the following.
Ground planes It is highly recommended that a ground plane be used on the board to provide all
components with a low inductive ground connection. However, in the areas of the amplifier inputs and
output, the ground plane can be removed to minimize the stray capacitance.
Proper power supply decoupling Use a 6.8-
μ
F tantalum capacitor in parallel with a 0.1-
μ
F ceramic
capacitor on each supply terminal. It may be possible to share the tantalum among several amplifiers
depending on the application, but a 0.1-
μ
F ceramic capacitor should always be used on the supply terminal
of every amplifier. In addition, the 0.1-
μ
F capacitor should be placed as close as possible to the supply
terminal. As this distance increases, the inductance in the connecting trace makes the capacitor less
effective. The designer should strive for distances of less than 0.1 inches between the device power
terminals and the ceramic capacitors.
Sockets Sockets can be used but are not recommended. The additional lead inductance in the socket pins
will often lead to stability problems. Surface-mount packages soldered directly to the printed-circuit board
is the best implementation.
Short trace runs/compact part placements Optimum high performance is achieved when stray series
inductance has been minimized. To realize this, the circuit layout should be made as compact as possible,
thereby minimizing the length of all trace runs. Particular attention should be paid to the inverting input of
the amplifier. Its length should be kept as short as possible. This will help to minimize stray capacitance at
the input of the amplifier.
Surface-mount passive components Using surface-mount passive components is recommended for high
performance amplifier circuits for several reasons. First, because of the extremely low lead inductance of
surface-mount components, the problem with stray series inductance is greatly reduced. Second, the small
size of surface-mount components naturally leads to a more compact layout thereby minimizing both stray
inductance and capacitance. If leaded components are used, it is recommended that the lead lengths be
kept as short as possible.
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