- 您现在的位置：买卖IC网 > PDF目录98242 > TLC5602MJ (TEXAS INSTRUMENTS INC) PARALLEL, 8 BITS INPUT LOADING, 0.03 us SETTLING TIME, 8-BIT DAC, CDIP20 PDF资料下载
参数资料
| 型号： | TLC5602MJ |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | DAC |
| 英文描述： | PARALLEL, 8 BITS INPUT LOADING, 0.03 us SETTLING TIME, 8-BIT DAC, CDIP20 |
| 封装： | CERAMIC, DIP-20 |
| 文件页数： | 11/12页 |
| 文件大小： | 242K |
| 代理商： | TLC5602MJ |
TLC5602C, TLC5602M
VIDEO 8-BIT DIGITAL-TO-ANALOG CONVERTERS
SLAS023D – FEBRUARY 1989 – REVISED JANUARY 2002
8
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION INFORMATION
The following design recommendations benefit the TLC5602 user:
D Physically separate and shield external analog and digital circuitry as much as possible to reduce system
noise.
D Use RF breadboarding or RF printed-circuit-board (PCB) techniques throughout the evaluation and
production process.
D Since ANLG GND and DGTL GND are not connected internally, these terminals need to be connected
externally. With breadboards, these ground lines should connect to the power-supply ground through
separate leads with proper supply bypassing. A good method is to use a separate twisted pair for the analog
and digital supply lines to minimize noise pickup.
Use wide ground leads or a ground plane on the PCB layouts to minimize parasitic inductance and
resistance. The ground plane is the better choice for noise reduction.
D ANLG VDD and DGTL VDD are also separated internally, so they must connect externally. These external
PCB leads should also be made as wide as possible. Place a ferrite bead or equivalent inductance in series
with ANLG VDD and the decoupling capacitor as close to the device terminals as possible before the ANLG
VDD and DGTL VDD leads are connected together on the board.
D Decouple ANLG VDD to ANLG GND and DGTL VDD to DGTL GND with a 1-F and 0.01-F capacitor,
respectively, as close as possible to the appropriate device terminals. A ceramic chip capacitor is
recommended for the 0.01-
F capacitor.
D Connect the phase compensation capacitor between COMP and ANLG GND with as short a lead-in as
possible.
D The no-connection (NC) terminals on the small-outline package should be connected to ANLG GND.
D Shield ANLG VDD, ANLG GND, and A OUT from the high-frequency terminals CLK and D7–D0. Place
ANLG GND traces on both sides of the A OUT trace on the PCB.
相关PDF资料 |
PDF描述 |
|---|---|
| TLC5602MJB | PARALLEL, 8 BITS INPUT LOADING, 0.03 us SETTLING TIME, 8-BIT DAC, CDIP20 |
| TLC5615IDGKRG4 | SERIAL INPUT LOADING, 12.5 us SETTLING TIME, 10-BIT DAC, PDSO8 |
| TLC5615IDR | SERIAL INPUT LOADING, 12.5 us SETTLING TIME, 10-BIT DAC, PDSO8 |
| TLC5615CP | SERIAL INPUT LOADING, 12.5 us SETTLING TIME, 10-BIT DAC, PDIP8 |
| TLC5615CD | SERIAL INPUT LOADING, 12.5 us SETTLING TIME, 10-BIT DAC, PDSO8 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| TLC5615 | 制造商:TI 制造商全称:Texas Instruments 功能描述:10-BIT DIGITAL-TO-ANALOG CONVERTERS |
| TLC56151P | 制造商:Texas Instruments 功能描述: |
| TLC5615C | 制造商:TI 制造商全称:Texas Instruments 功能描述:10-BIT DIGITAL-TO-ANALOG CONVERTERS |
| TLC5615C_07 | 制造商:TI 制造商全称:Texas Instruments 功能描述:10-BIT DIGITAL-TO-ANALOG CONVERTERS |
| TLC5615CD | 功能描述:数模转换器- DAC 10bit DAC RoHS:否 制造商:Texas Instruments 转换器数量:1 DAC 输出端数量:1 转换速率:2 MSPs 分辨率:16 bit 接口类型:QSPI, SPI, Serial (3-Wire, Microwire) 稳定时间:1 us 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-14 封装:Tube |
发布紧急采购，3分钟左右您将得到回复。