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| 型号： | TLE7368G |
| 厂商： | INFINEON TECHNOLOGIES AG |
| 元件分类： | 电源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO36 |
| 封装： | PLASTIC, SOP-36 |
| 文件页数： | 17/39页 |
| 文件大小： | 932K |
| 代理商： | TLE7368G |
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TLE7368
Detailed Internal Circuits Description
Data Sheet
24
Rev. 1.1, 2007-11-08
5.1.4
Charge Pump
The charge pump serves as support circuit for the Buck converter’s high side driver supply, the linear regulators
drive circuits for low drop operation and the internal device biasing blocks. In order to guarantee full device
operation at battery voltages as allow as even 4.5 V, the concept of a voltage tripler is chosen for the charge pump.
It operates at a switching frequency of typical 2 MHz utilizing three small external capacitors, two pumping caps
and one storage capacitor. The CCP circuit is equipped with a current limit function which avoids destruction in
case of a short of one of the external CCP capacitors. The charge pump’s output, CCP, is designed to supply the
circuitry described above, it should not be used as e.g. driver rail for external on board/PCB circuits.
5.1.5
Buck Converter Protection Circuits
Besides the circuits mandatory for the Buck converter operation additional protection circuits are foreseen which
help preventing false operation of the device. Undervoltage lockouts are foreseen at the battery input line1) and
the high side driver supply rail to ensure the device operates only with proper voltages present. The overvoltage
shutdown at the Buck converter output provides a safe high side shutdown for the case where the Buck control
loop becomes messed up due to non predictable circumstances. At overtemperatures the thermal shutdown circuit
disables the Buck converter until the device cools down to be enabled again.
5.2
Linear Regulators
The TLE7368 features three linear voltage regulator circuits, two fully integrated DMOS low drop voltage
regulators and one integrated linear control circuit to operate with an external NPN power stage.
Integrated linear regulator one (LDO1) offers a 5 V output and the second integrated linear regulator (LDO2) can
be configured with pin SEL_LDO2 either for 2.6 V or for 3.3 V. With SEL_LDO2 tied to GND 2.6 V will adjust at
the output of LDO2, SEL_LDO2 being connected to Q_LDO2 gives the 3.3 V option. The external regulator will
adjust its output to 1.5 V with the emitter of the NPN power stage directly connected to pin FB_EXT, by using a
voltage divider, higher output voltages can be achieved.
The regulators are designed for low drop operation and offer high output voltage accuracies to meet the needs of
current and next generation 32-bit microcontroller families. Additionally all regulators feature a short circuit
protection, i.e. the integrated regulators contain a output current limit function whereas the control circuit for the
external NPN power stage limits the maximum base current.
For low on chip power dissipation the input of LDO1 is internally directly connected to the Buck converter output
(FB/L_IN). LDO2’s input is on purpose externally accessible at IN_LDO2. This allows the insertion of a drop
element between the Buck converter output and IN_LDO2 to split the power dissipation and avoid high losses on
the TLE7368. Similar for the external NPN power stage regulator, the collector of the NPN can be either connected
directly to the Buck converter output or a drop element can be inserted in between to split power dissipation.
5.3
Voltage Tracking Regulators
For off board/off PCB supplies, i.e. sensors, two voltage tracking regulators are incorporated in the TLE7368. Their
outputs follow the output of the main 5 V regulator, Q_LDO1, within a tight tolerance of
±10 mV. The tracking
regulators are implemented with bipolar PNP power stages for improved ripple rejection to reduce emission when
lead off board. Both tracker outputs can withstand short circuits to GND and battery in a range of -5 V to +40 V.
When shorted to lower levels than the nominal output voltage level the current limit function prevents excessive
current draw.
1) Not shown in the schematic, Figure 3.
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