参数资料
型号: TLV1570CPWR
厂商: TEXAS INSTRUMENTS INC
元件分类: ADC
英文描述: 8-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20
封装: GREEN, TSSOP-20
文件页数: 28/32页
文件大小: 634K
代理商: TLV1570CPWR
TLV1570
2.7 V TO 5.5 V 8-CHANNEL 10-BIT 1.25-MSPS
SERIAL ANALOG-TO-DIGITAL CONVERTER
SLAS169B – DECEMBER 1997– REVISED OCTOBER 2000
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
configuration register (CR) definition
BIT
DESCRIPTION
5 V
3 V
Software power down:
X
DI15
0:
1:
Normal
Power down enabled
X
DI14
Reads out values of the internal register, 1 – read. Only DI15 – DI1 are read out.
X
These two bits select the self-test voltage to be applied to the ADC input during next clock cycle:
X
00:
Allow AIN to come in normally
DI13, DI12
01:
Apply AGND to AIN
10:
Apply VREF/2 to AIN
11:
N/A
Choose speed application
X
DI11
0:
High speed (higher power consumption)
1:
Low speed (lower power consumption)
This bit enables channel auto-scan function.
X
DI10
0:
1:
Autoscan disabled
Autoscan enabled
DI9 – DI7 These three bits select which of the eight
channels is to be used (if DI10 = 0).
DI9, DI8 These two bits select the channel swept
sequence used by auto scan mode (if DI10 = 1)
X
000:
Channel 0 selected as input
00:
Analog inputs CH0, CH1, CH2,
….., CH7
sequentially selected
001:
Channel 1 selected as input
01:
Analog inputs CH1, CH3, CH5, CH7
sequentially selected
DI9, DI8, DI7
010:
Channel 2 selected as input
10:
Analog inputs CH0, CH2, CH4, CH6
sequentially selected
011:
Channel 3 selected as input
11:
Analog inputs CH7, CH6, CH5,
….., CH0
sequentially selected
100:
Channel 4 selected as input
DI7 Auto-scan reset
101:
Channel 5 selected as input
0:
No reset
110:
Channel 6 selected as input
1:
Reset autoscan sequence
111:
Channel 7 selected as input
Selects Internal or external reference voltage:
X
DI6
0:
1:
External
Internal
Selects internal reference voltage value to be applied to the ADC during next conversion cycle.
DI5
0:
2.3 V
X
1:
3.8 V
X
Enables/disables autopower-down function:
X
DI4
1:
Enable
0:
Disable
DI3
Performance optimizer – linearity
0: AVDD = 5.5 V to 3.6 V
1: AVDD = 3.5 V to 2.7 V
X
DI2
Always write 0 (reserved bit)
X
DI1
Always write 0 (reserved bit)
X
DI0
Always write 0 (reserved bit)
X
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