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参数资料
| 型号： | TLV2556IDW |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | ADC |
| 英文描述： | 11-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20 |
| 封装： | GREEN, PLASTIC, SOIC-20 |
| 文件页数： | 21/37页 |
| 文件大小： | 729K |
| 代理商： | TLV2556IDW |
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TLV2556
SLAS355A – DECEMBER 2001 – REVISED SEPTEMBER 2002
28
www.ti.com
PRINCIPLES OF OPERATION
default mode
When the DATA IN pin is held high, the ADC goes into hardware default mode because the CFGR2 bits are all
programmed to the default values after 8 I/O CLOCKs. This means the ADC is programmed for an external
reference and pin 19 as EOC. In addition, channel AIN0 is selected. The first conversion is invalid therefore the
conversion result should be ignored. On the next cycle, AIN0 is sampled and converted. This mode of operation
is valid when CS is toggled or held low after the first cycle.
To remove the device from hardware default mode, CFGR2 bit D0 must be reset to 0. Once this is done, the
host must program CFGR1 on the next cycle and disregard the result from the current cycle’s conversion.
data input
The data input is internally connected to an 8-bit serial-input address and control register. The register defines
the operation of the converter and the output data length. The host provides the input data byte with the MSB
first. Each data bit is clocked in on the rising edge of the I/O CLOCK sequence (see Table 2 for the data
input-register format).
Table 2. Command Set (CMR) and Configuration
01: 8-bit output length
X0: 12-bit output length
11: 16-bit output length (default)
0: MSB out first (default)
1: LSB out first
0: Unipolar binary (default)
1: Bipolar 2s complement
00: Internal 4.096 reference
01: Internal 2.048 reference
11: External reference (default)
0: Pin 19 output EOC (default)
1: Pin 19 output Int
0: Normal mode
(CFGR1 needs to be programmed)
1: Default mode enabled
(D[3:0] of CFGR1 and D[3:1] of
CFGR2 set to default)
SDI D[7:4]
Binary,
HEX
COMMAND
0000b
0001b
0010b
0011b
0100b
0101b
0110b
0111b
1000b
1001b
1010b
1011b
1100b
1101b
1110b
1111b
0h
1h
2h
3h
4h
5h
6h
7h
8h
9h
Ah
Bh
Ch
Dh
Eh
Fh
SELECT analog input channel 0
SELECT analog input channel 1
SELECT analog input channel 2
SELECT analog input channel 3
SELECT analog input channel 4
SELECT analog input channel 5
SELECT analog input channel 6
SELECT analog input channel 7
SELECT analog input channel 8
SELECT analog input channel 9
SELECT analog input channel 10
SELECT TEST,
Voltage = (VREF+ + VREF–)/2
SELECT TEST, Voltage = REFM
SELECT TEST, Voltage = REFP
SW POWERDOWN (analog + reference)
ACCESS CFGR2
CONFIGURATION
CFGR1
SDI
D[3:0]
D[3:2]
D1
D0
CONFIGURATION
CFGR2
SDI
D[3:0]
D[3:2]
D1
D0
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| TLV2556IDWG4 | 功能描述:模数转换器 - ADC 12-Bit 200 KSPS 11 Ch Lo-Pwr RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| TLV2556IDWR | 功能描述:模数转换器 - ADC 12-Bit 200 KSPS 11 Ch Lo-Pwr RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
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| TLV2556IPW | 制造商:Texas Instruments 功能描述:12BIT ADC 200KSPS 2556 TSSOP20 制造商:Texas Instruments 功能描述:12BIT ADC, 200KSPS, 2556, TSSOP20 制造商:Texas Instruments 功能描述:12BIT ADC, 200KSPS, 2556, TSSOP20; Resolution (Bits):12bit; Sampling Rate:200kSPS; Supply Voltage Type:Single; Supply Voltage Min:2.7V; Supply Voltage Max:5.5V; Supply Current:3mA; Digital IC Case Style:TSSOP; No. of Pins:20; Input ;RoHS Compliant: Yes |
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