参数资料
型号: TLV320AIC3253IYZKR
厂商: TEXAS INSTRUMENTS INC
元件分类: 消费家电
英文描述: SPECIALTY CONSUMER CIRCUIT, BGA25
封装: 2.70 X 2.70 MM, LEAD FREE, WCSP-25
文件页数: 16/35页
文件大小: 738K
代理商: TLV320AIC3253IYZKR
www.ti.com
SLOS631 – MARCH 2010
Table 9. Overview – DAC Predefined Processing Blocks (continued)
Processing
Interpolation
Channel
1st Order
Num. of
DRC
3D
Beep
RC Class
Block No.
Filter
IIR Available
Biquads
Generator
PRB_P3
A
Stereo
Yes
6
No
10
PRB_P4
A
Left
No
3
No
4
PRB_P5
A
Left
Yes
6
Yes
No
6
PRB_P6
A
Left
Yes
6
No
6
PRB_P7
B
Stereo
Yes
0
No
6
PRB_P8
B
Stereo
No
4
Yes
No
8
PRB_P9
B
Stereo
No
4
No
8
PRB_P10
B
Stereo
Yes
6
Yes
No
10
PRB_P11
B
Stereo
Yes
6
No
8
PRB_P12
B
Left
Yes
0
No
3
PRB_P13
B
Left
No
4
Yes
No
4
PRB_P14
B
Left
No
4
No
4
PRB_P15
B
Left
Yes
6
Yes
No
6
PRB_P16
B
Left
Yes
6
No
4
PRB_P17
C
Stereo
Yes
0
No
3
PRB_P18
C
Stereo
Yes
4
Yes
No
6
PRB_P19
C
Stereo
Yes
4
No
4
PRB_P20
C
Left
Yes
0
No
2
PRB_P21
C
Left
Yes
4
Yes
No
3
PRB_P22
C
Left
Yes
4
No
2
PRB_P23
A
Stereo
No
2
No
Yes
No
8
PRB_P24
A
Stereo
Yes
5
Yes
No
12
PRB_P25
A
Stereo
Yes
5
Yes
12
For more detailed information see the Application Reference Guide, SLAU303
Powertune
The TLV320AIC3253 features PowerTune, a mechanism to balance power-versus-performance trade-offs at the
time of device configuration. The device can be tuned to minimize power dissipation, to maximize performance,
or to an operating point between the two extremes to best fit the application. The TLV320AIC3253 PowerTune
modes are called PTM_P1 to PTM_P4 for the playback (DAC) path.
For more detailed information see the Application Reference Guide, SLAU303
Digital Audio I/O Interface
Audio data is transferred between the host processor and the TLV320AIC3253 via the digital audio data serial
interface, or audio bus. The audio bus on this device is very flexible, including left or right-justified data options,
support for I2S or PCM protocols, programmable data length options, a TDM mode for multichannel operation,
very flexible master/slave configurability for each bus clock line, and the ability to communicate with multiple
devices within a system directly.
The audio bus of the TLV320AIC3253 can be configured for left or right-justified, I2S, DSP, or TDM modes of
operation, where communication with standard telephony PCM interfaces is supported within the TDM mode.
These modes are all MSB-first, with data width programmable as 16, 20, 24, or 32 bits by configuring Page 0,
Register 27, D(5:4). In addition, the word clock and bit clock can be independently configured in either Master or
Slave mode, for flexible connectivity to a wide variety of processors. The word clock is used to define the
beginning of a frame, and may be programmed as either a pulse or a square-wave signal. The frequency of this
clock corresponds to the maximum of the selected ADC and DAC sampling frequencies.
Copyright 2010, Texas Instruments Incorporated
23
Product Folder Link(s): TLV320AIC3253
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