- 您现在的位置：买卖IC网 > PDF目录98255 > TLV5535IPWG4 (TEXAS INSTRUMENTS INC) 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28 PDF资料下载
参数资料
| 型号： | TLV5535IPWG4 |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | ADC |
| 英文描述： | 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28 |
| 封装： | GREEN, PLASTIC, TSSOP-28 |
| 文件页数： | 8/35页 |
| 文件大小： | 723K |
| 代理商： | TLV5535IPWG4 |
第1页第2页第3页第4页第5页第6页第7页当前第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页
TLV5535
8-BIT, 35 MSPS, LOW-POWER ANALOG-TO-DIGITAL CONVERTER
SLAS221 – JUNE 1999
16
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLE OF OPERATION
digital inputs (continued)
The CLK signal at high frequencies should be considered as an analog input. Overshoot/undershoot should be
minimized by proper termination of the signal close to the TLV5535. An important cause of performance
degradation for a high-speed ADC is clock jitter. Clock jitter causes uncertainty in the sampling instant of the
ADC, in addition to the inherent uncertainty on the sampling instant caused by the part itself, as specified by
its aperture jitter. There is a theoretical relationship between the frequency (f) and resolution (2N) of a signal
that needs to be sampled and the maximum amount of aperture error dtmax that is tolerable. The following
formula shows the relation:
dtmax + 1 B p f2
N
)1
As an example, for an 8-bit converter with a 15-MHz input, the jitter needs to be kept < 41 pF in order not to have
changes in the LSB of the ADC output due to the total aperture error.
digital outputs
The output of the TLV5535 is standard binary code. Capacitive loading on the output should be kept as low as
possible (a maximum loading of 10 pF is recommended) to provide the best performance. Higher output loading
causes higher dynamic output currents and can increase noise coupling into the analog front end of the device.
To drive higher loads, the use of an output buffer is recommended.
When clocking output data from the TLV5535, it is important to observe its timing relation to CLK. The pipeline
ADC delay is 4.5 clock cycles to which the maximum output propagation delay is added. See Note 6 in the
specification section for more details.
layout, decoupling and grounding rules
It is necessary for any PCB using the TLV5535 to have proper grounding and layout to achieve the stated
performance. Separate analog and digital ground planes that are spliced underneath the device are advisable.
The TLV5535 has digital and analog terminals on opposite sides of the package to make proper grounding
easier. Since there is no internal connection between the analog and digital grounds, they have to be joined on
the PCB. Joining the digital and analog grounds at a point in close proximity to the TLV5535 is advised.
As for power supplies, separate analog and digital supply terminals are provided on the device (AVDD/DVDD).
The supply to the digital output drivers is kept separate also (DRVDD). Lowering the voltage on this supply from
the nominal 3.3 V to 3 V improves performance because of the lower switching noise caused by the output
buffers.
Due to the high sampling rate and switched-capacitor architecture, the TLV5535 generates transients on the
supply and reference lines. Proper decoupling of these lines is essential. Decoupling as shown in the schematic
of the TLV5535 EVM is recommended.
相关PDF资料 |
PDF描述 |
|---|---|
| TLV5535IPW | 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28 |
| TLV5540CPW | 1-CH 8-BIT FLASH METHOD ADC, PARALLEL ACCESS, PDSO24 |
| TLV5540INSLE | 1-CH 8-BIT FLASH METHOD ADC, PARALLEL ACCESS, PDSO24 |
| TLV5540IPW | 1-CH 8-BIT FLASH METHOD ADC, PARALLEL ACCESS, PDSO24 |
| TLV5540CNSLE | 1-CH 8-BIT FLASH METHOD ADC, PARALLEL ACCESS, PDSO24 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| TLV5535IPWR | 功能描述:模数转换器 - ADC 8 Bit 35 MSPS Single Ch. Low Pwr RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| TLV5535IPWRG4 | 功能描述:模数转换器 - ADC 8 Bit 35 MSPS Single Ch. Low Pwr RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| TLV5535IPWRG4Q1 | 功能描述:模数转换器 - ADC 8 Bit 35MSPS ADC Sgl Ch Low Pwr RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| TLV5535IPWRQ1 | 功能描述:模数转换器 - ADC Auto Cat 8B 35MSPS ADC Sgl Ch. Lo Pwr RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| TLV5535PW | 制造商:TI 制造商全称:Texas Instruments 功能描述:8-BIT, 35 MSPS, LOW-POWER ANALOG-TO-DIGITAL CONVERTER |
发布紧急采购，3分钟左右您将得到回复。