参数资料
型号: TLV5628IDWRG4
厂商: TEXAS INSTRUMENTS INC
元件分类: DAC
英文描述: OCTAL, SERIAL INPUT LOADING, 10 us SETTLING TIME, 8-BIT DAC, PDSO16
封装: GREEN, PLASTIC, SOIC-16
文件页数: 15/18页
文件大小: 410K
代理商: TLV5628IDWRG4
TLV5628C, TLV5628I
OCTAL 8-BIT DIGITAL-TO-ANALOG CONVERTERS
SLAS108A – JANUARY 1995 – REVISED NOVEMBER 1995
6
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
linearity, offset, and gain error
When an amplifier is operated from a single supply, the voltage offset can still be either positive or negative. With
a positive offset, the output voltage changes on the first code change. With a negative offset the output voltage
may not change with the first code depending on the magnitude of the offset voltage.
The output amplifier, with a negative voltage offset, attempts to drive the output to a negative voltage. However,
since the most negative supply rail is ground, the output cannot drive to a negative voltage.
So when the output offset voltage is negative, the output voltage remains at 0 volts until the input code value
produces a sufficient output voltage to overcome the inherent negative offset voltage resulting in the transfer
function shown in Figure 5.
DAC Code
Output
Voltage
0 V
Negative
Offset
Figure 5. Effect of Negative Offset (Single Supply)
The negative offset error produces a breakpoint, not a linearity error. The transfer function would follow the
dotted line if the output buffer could drive to a negative voltage.
For a DAC, linearity is measured between zero input code (all inputs 0) and full scale code (all inputs 1) after
offset and full scale is adjusted out or accounted for in some way. However, single supply operation does not
allow for adjustment when the offset is negative due to the breakpoint in the transfer function. The linearity in
the unipolar mode is measured between full scale code and the lowest code which produces a positive output
voltage.
The code is calculated from the maximum specification for the negative offset.
equivalent inputs and outputs
GND
Vref
Input
VDD
To DAC
Resistor
String
_
+
VDD
DAC
Voltage Output
ISINK
60
A
Typical
84 k
84 k
× 1
× 2
Output
Range
Select
Input from
Decoded DAC
Register String
INPUT CIRCUIT
OUTPUT CIRCUIT
GND
相关PDF资料
PDF描述
TLV5628IDWR OCTAL, SERIAL INPUT LOADING, 10 us SETTLING TIME, 8-BIT DAC, PDSO16
TLV5630IDWRG4 SERIAL INPUT LOADING, 3 us SETTLING TIME, 12-BIT DAC, PDSO20
TLV5630IDWR SERIAL INPUT LOADING, 3 us SETTLING TIME, 12-BIT DAC, PDSO20
TLV5631IDW SERIAL INPUT LOADING, 3 us SETTLING TIME, 10-BIT DAC, PDSO20
TLV5631IPW SERIAL INPUT LOADING, 3 us SETTLING TIME, 10-BIT DAC, PDSO20
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