参数资料
型号: TLV5633CPWR
厂商: TEXAS INSTRUMENTS INC
元件分类: DAC
英文描述: PARALLEL, WORD INPUT LOADING, 3.5 us SETTLING TIME, 12-BIT DAC, PDSO20
封装: GREEN, PLASTIC, TSSOP-20
文件页数: 21/25页
文件大小: 486K
代理商: TLV5633CPWR
www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
OPERATING CHARACTERISTICS
SLAS190C – MARCH 1999 – REVISED SEPTEMBER 2006
over recommended operating free-air temperature range, V
ref = 2.048 V, Vref = 1.024 V (unless otherwise noted)
REFERENCE PIN CONFIGURED AS OUTPUT (REF)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Vref(OUTL)
Low reference voltage
1.003
1.024
1.045
V
Vref(OUTH)
High reference voltage
AVDD = DVDD > 4.75 V
2.027
2.048
2.069
V
Iref(source)
Output source current
1
mA
Iref(sink)
Output sink current
-1
mA
PSRR
Power supply rejection ratio
-48
dB
REFERENCE PIN CONFIGURED AS INPUT (REF)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VI
Input voltage
0
AVDD-1.5
V
RI
Input resistance
10
M
CI
Input capacitance
5
pF
Fast
900
Reference input bandwidth
REF = 0.2 Vpp + 1.024 V dc
kHz
Slow
500
Fast
-87
10 kHz
dB
Slow
-77
REF = 1 Vpp + 2.048 V dc,
Harmonic distortion, reference input
Fast
-74
AVDD = 5 V
50 kHz
dB
Slow
-61
100 kHz
Fast
-66
dB
Reference feedthrough
REF = 1 Vpp at 1 kHz + 1.024 V dc (1)
-80
dB
DIGITAL INPUTS
IIH
High-level digital input current
VI = DVDD
1
A
IIL
Low-level digital input current
VI = 0 V
-1
A
CI
Input capacitance
8
pF
(1)
Reference feedthrough is measured at the DAC output with an input code = 0x000.
over recommended operating free-air temperature range, V
ref = 2.048 V, and Vref = 1.024 V, (unless otherwise noted)
ANALOG OUTPUT DYNAMIC PERFORMANCE
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Fast
1
3
ts(FS)
Output settling time, full scale
RL = 10 k, CL = 100 pF (1)
s
Slow
3.5
7
Fast
0.5
1.5
ts(CC)
Output settling time, code to code
RL = 10 k, CL = 100 pF (2)
s
Slow
1
2
Fast
6
10
SR
Slew rate
RL = 10 k, CL = 100 pF (3)
V/s
Slow
1.2
1.7
Glitch energy
DIN = 0 to 1, fCLK = 100 kHz, CS = VDD
5
nV-S
SNR
Signal-to-noise ratio
73
78
SINAD
Signal-to-noise + distortion
61
67
fs = 480 kSPS, fB = 20 kHz, fout = 1 kHz,
dB
RL = 10 k, CL = 100 pF
THD
Total harmonic distortion
-69
-62
SFDR
Spurious free dynamic range
63
74
(1)
Settling time is the time for the output signal to remain within ±0.5 LSB of the final measured value for a digital input code change of
0x020 to 0xFDF or 0xFDF to 0x020 respectively.
(2)
Settling time is the time for the output signal to remain within ±0.5 LSB of the final measured value for a digital input code change of one
count.
(3)
Slew rate determines the time it takes for a change of the DAC output from 10% to 90% full-scale voltage.
5
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