参数资料
| 型号： | TLV70430DBVT |
| 厂商： | Texas Instruments |
| 文件页数： | 7/15页 |
| 文件大小： | 0K |
| 描述： | IC REG LDO 3V .15A SOT23-5 |
| 标准包装： | 250 |
| 稳压器拓扑结构： | 正，固定式 |
| 输出电压： | 3V |
| 输入电压： | 最高 24V |
| 电压 - 压降（标准）： | 0.85V @ 100mA |
| 稳压器数量： | 1 |
| 电流 - 输出： | 150mA（最小值） |
| 电流 - 限制（最小）： | 160mA |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | SC-74A，SOT-753 |
| 供应商设备封装： | SOT-23-5 |
| 包装： | 带卷 (TR) |
| 其它名称： | 296-32419-2 TLV70430DBVT-ND |
TLV704xx
SBVS148C – OCTOBER 2010 – REVISED AUGUST 2011
APPLICATION INFORMATION
The TLV704xx series belong to a family of ultralow I Q
T A is the ambient temperature.
LDO regulators. I Q remains fairly constant over the
complete output load current and temperature range.
The devices are ensured to operate over a
The regulator
dissipation
is
calculated
using
temperature range of – 40 ° C to +125 ° C.
P D + V IN * V OUT
I OUT
(2)
INPUT AND OUTPUT CAPACITOR
REQUIREMENTS
The TLV704 requires a 1- μ F or larger capacitor
connected between OUT and GND for stability.
Ceramic or tantalum capacitors can be used. Larger
value capacitors result in better transient and noise
performance.
Although an input capacitor is not required for
stability, when a 0.1- μ F or larger capacitor is placed
between IN and GND, it counteracts reactive input
sources and improves transient and noise
performance. Higher value capacitors are necessary
if large, fast rise time load transients are anticipated.
BOARD LAYOUT RECOMMENDATIONS
Input and output capacitors should be placed as
close to the device pins as possible. To avoid
interference of noise and ripple on the board, it is
recommended that the board be designed with
separate ground planes for V IN and V OUT , with the
ground plane connected only at the device GND pin.
In addition, the ground connection for the output
capacitor should be connected directly to the device
Power dissipation resulting from quiescent current is
negligible.
REGULATOR PROTECTION
The TLV704xx series of LDO regulators use a
PMOS-pass transistor that has a built-in back diode
that conducts reverse current when the input voltage
drops below the output voltage (for example, during
power-down). Current is conducted from the output to
the input and is not internally limited. If extended
reverse voltage operation is anticipated, external
limiting might be appropriate.
The TLV704xx features internal current limiting.
During normal operation, the TLV704xx limits output
current to approximately 250 mA. When current
limiting engages, the output voltage scales back
linearly until the overcurrent condition ends. Take
care not to exceed the rated maximum operating
junction temperature of +125 ° C. Continuously running
the device under conditions where the junction
temperature exceeds +125 ° C degrades device
reliability.
The ability to remove heat from the die is different for
GND pin.
each
package
type,
presenting
different
considerations in the printed circuit board (PCB)
POWER DISSIPATION AND JUNCTION
TEMPERATURE
To ensure reliable operation, worst-case junction
temperature should not exceed +125 ° C. This
restriction limits the power dissipation the regulator
can handle in any given application. To ensure the
junction temperature is within acceptable limits,
calculate the maximum allowable dissipation, P D(max) ,
and the actual dissipation, P D , which must be less
than or equal to P D(max) .
The maximum power dissipation limit is determined
layout. The PCB area around the device that is free
of other components moves the heat from the device
to the ambient air. Performance data for JEDEC
high-K boards are given in the Power Dissipation
Rating table. Using heavier copper increases the
effectiveness in removing heat from the device. The
addition of plated through-holes to heat-dissipating
layers also improves heatsink effectiveness. Power
dissipation depends on input voltage and load
conditions. Power dissipation (P D ) is equal to the
product of the output current and the voltage drop
across the output pass element, as shown in
P D(max) + J
T max* T A
R q JA
(1)
PACKAGE MOUNTING
Solder pad footprint recommendations
for
the
where:
T J max is the maximum allowable junction
temperature.
R θ JA is the thermal resistance junction-to-ambient
for the package (see the Power Dissipation
Rating table).
Copyright ? 2010 – 2011, Texas Instruments Incorporated
TLV704xx are available from the Texas Instruments
the DBV package is appended to this data sheet.
7
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相关代理商/技术参数 |
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| TLV70433DBVEVM-712 | 功能描述:电源管理IC开发工具 TLV70433 Eval Mod RoHS:否 制造商:Maxim Integrated 产品:Evaluation Kits 类型:Battery Management 工具用于评估:MAX17710GB 输入电压: 输出电压:1.8 V |
| TLV70433DBVEVM-712 | 制造商:Texas Instruments 功能描述:EVAL BOARD, TLV70433 3.3V, 150mA LDO REG |
| TLV70433DBVR | 功能描述:低压差稳压器 - LDO 150mAUltra-Low IQ High Vin LDO Reg RoHS:否 制造商:Texas Instruments 最大输入电压:36 V 输出电压:1.4 V to 20.5 V 回动电压（最大值）:307 mV 输出电流:1 A 负载调节:0.3 % 输出端数量: 输出类型:Fixed 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-20 |
| TLV70433DBVRG4 | 制造商:Texas Instruments 功能描述: |
| TLV70433DBVT | 功能描述:低压差稳压器 - LDO 150mAUltra-Low IQ High Vin LDO Reg RoHS:否 制造商:Texas Instruments 最大输入电压:36 V 输出电压:1.4 V to 20.5 V 回动电压（最大值）:307 mV 输出电流:1 A 负载调节:0.3 % 输出端数量: 输出类型:Fixed 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-20 |
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