参数资料
型号: TLV70433DBVR
厂商: Texas Instruments
文件页数: 2/15页
文件大小: 0K
描述: IC REG LDO 3.3V .15A SOT23-5
标准包装: 3,000
稳压器拓扑结构: 正,固定式
输出电压: 3.3V
输入电压: 最高 24V
电压 - 压降(标准): 0.85V @ 100mA
稳压器数量: 1
电流 - 输出: 150mA(最小值)
电流 - 限制(最小): 160mA
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: SC-74A,SOT-753
供应商设备封装: SOT-23-5
包装: 带卷 (TR)

TLV704xx
SBVS148C – OCTOBER 2010 – REVISED AUGUST 2011
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
AVAILABLE OPTIONS (1)
PRODUCT
TLV704 xxyyyz
V OUT
XX is nominal output voltage (for example 33 = 3.3 V)
YYY is Package Designator
Z is Package Quantity
(1)
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or visit the
device product folder at www.ti.com .
ABSOLUTE MAXIMUM RATINGS (1)
Over operating free-air temperature range, unless otherwise noted.
VALUE
MIN
MAX
UNIT
Voltage (2)
Current source
IN
OUT
– 0.3
Internally limited
24
V
Temperature
Electrostatic Discharge Rating (3)
Operating junction, T J
Storage, T stg
Human body model (HBM)
QSS 009-105 (JESD22-A114A)
Charge device model (CDM)
QSS 009-147 (JESD22-C101B.01)
– 40
– 65
+150
+150
2
500
° C
° C
kV
V
(1)
(2)
(3)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods my affect device reliability.
All voltages are with respect to network ground terminal.
ESD testing is performed according to the respective JESD22 JEDEC standard.
THERMAL INFORMATION
TLV70433DBV
THERMAL METRIC (1)
DBV
5 PINS
UNITS
θ JA
θ JCtop
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
213.1
110.9
θ JB
ψ JT
ψ JB
θ JCbot
Junction-to-board thermal resistance
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
97.4
22.0
78.4
n/a
° C/W
(1)
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953 .
POWER DISSIPATION RATING TABLE
BOARD
High-K (1)
PACKAGE
DBV
R θ JA
213.1 ° C/W
T A ≤ 25 ° C POWER
RATING
470 mW
T A = +70 ° C POWER
RATING
258 mW
T A = +85 ° C POWER
RATING
188 mW
(1)
2
The JEDEC High-K (2s2p) board design used to derive this data was a 3-inch × 3-inch, multilayer board with 1-ounce internal power
and ground planes and 2-ounce copper traces on top and bottom of the board.
Copyright ? 2010 – 2011, Texas Instruments Incorporated
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TLV70436DBVT 功能描述:低压差稳压器 - LDO 150mA,Ultra-Low IQ, High Vin LDO Reg RoHS:否 制造商:Texas Instruments 最大输入电压:36 V 输出电压:1.4 V to 20.5 V 回动电压(最大值):307 mV 输出电流:1 A 负载调节:0.3 % 输出端数量: 输出类型:Fixed 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-20
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