参数资料
型号: TM4EP64BJN-50
厂商: Texas Instruments, Inc.
英文描述: EXTENDED-DATA-OUT DYNAMIC RAM MODULES
中文描述: 扩展数据输出动态随机存储器模块
文件页数: 13/22页
文件大小: 354K
代理商: TM4EP64BJN-50
TM4EP64BJN, TM4EP64BPN, TM4EP64CJN, TM4EP64CPN 4194304 BY 64-BIT
TM4EP72BJN, TM4EP72BPN, TM4EP72CJN, TM4EP72CPN 4194304 BY 72-BIT
EXTENDED-DATA-OUT DYNAMIC RAMMODULES
SMMS682A – AUGUST 1997– REVISED MARCH 1998
13
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
ac timing requirements (see Note 3)
’4EP64xxN-50
’4EP72xxN-50
’4EP64xxN-60
’4EP72xxN-60
’4EP64xxN-70
’4EP72xxN-70
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
tRC
tRWC
tRASP
tRAS
tRP
tWP
tASC
tASR
tDS
tRCS
tCWL
tRWL
Cycle time, random read or write
84
104
124
ns
Cycle time, read-write
111
135
160
ns
Pulse duration, RASx active, fast-page mode (see Note 6)
50
100 000
60
100 000
70
100 000
ns
Pulse duration, RASx active, non-page mode (see Note 6)
50
10 000
60
10 000
70
10 000
ns
Pulse duration, RASx precharge
30
40
50
ns
Pulse duration, write command
8
10
10
ns
Setup time, column address
0
0
0
ns
Setup time, row address
0
0
0
ns
Setup time, data in (see Note 7)
0
0
0
ns
Setup time, read command
0
0
0
ns
Setup time, write command before CASx precharge
8
10
12
ns
Setup time, write command before RASx precharge
8
10
12
ns
tWCS
Setup time, write command before CASx active
(early-write only)
0
0
0
ns
tWRP
tWTS
tCSR
tCAH
tDH
tRAH
tRCH
tRRH
tWCH
tROH
tWRH
tWTH
tCHR
tOEH
tCHS
tRHCP
tAWD
tCPW
tCRP
tCWD
tOED
tRAD
tRAL
tCAL
NOTES:
Setup time, WEx high before RASx low (CBR refresh only)
10
10
10
ns
Setup time, WEx low before RASx low (test mode only)
10
10
10
ns
Setup time, CASx referenced to RASx (CBR refresh only)
5
5
5
ns
Hold time, column address
8
10
12
ns
Hold time, data in (see Note 7)
8
10
12
ns
Hold time, row address
8
10
10
ns
Hold time, read command referenced to CASx (see Note 8)
0
0
0
ns
Hold time, read command referenced to RASx (see Note 8)
0
0
0
ns
Hold time, write command during CASx active (early-write only)
8
10
12
ns
Hold time, RASx referenced to OEx
10
10
10
ns
Hold time, WEx high after RASx low (CBR refresh)
10
10
10
ns
Hold time, WEx low after RASx low (test mode only)
10
10
10
ns
Hold time, CASx referenced to RASx (CBR refresh only)
10
10
10
ns
Hold time, OEx command
13
15
18
ns
Hold time, CASx referenced to RASx (self-refresh only)
– 50
– 50
– 50
ns
Hold time, RASx active from CASx precharge
28
35
40
ns
Delay time, column address to write command (read-write only)
42
49
57
ns
Delay time, WEx low after CASx precharge (read-write only)
45
54
62
ns
Delay time, CASx precharge to RASx
5
5
5
ns
Delay time, CASx to write command (read-write only)
30
34
40
ns
Delay time, OEx to data in
13
15
18
ns
Delay time, RASx to column address (see Note 9)
10
25
12
30
12
35
ns
Delay time, column address to RASx precharge
25
30
35
ns
Delay time, column address to CASx precharge
18
20
25
ns
3. With ac parameters, it is assumed that tT = 2 ns.
6. In a read-write cycle, tRWD and tRWL must be observed.
7. Referenced to the later of CASx or WEx in write operations
8. Either tRCH or tRRH must be satisfied for a read cycle.
9. The maximum value is specified only to ensure access time.
相关PDF资料
PDF描述
TM4EP64BJN-60 EXTENDED-DATA-OUT DYNAMIC RAM MODULES
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TM4EP64BJN-60 制造商:TI 制造商全称:Texas Instruments 功能描述:EXTENDED-DATA-OUT DYNAMIC RAM MODULES
TM4EP64BJN-70 制造商:TI 制造商全称:Texas Instruments 功能描述:EXTENDED-DATA-OUT DYNAMIC RAM MODULES
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TM4EP64BPN-50 制造商:TI 制造商全称:Texas Instruments 功能描述:EXTENDED-DATA-OUT DYNAMIC RAM MODULES
TM4EP64BPN-60 制造商:TI 制造商全称:Texas Instruments 功能描述:EXTENDED-DATA-OUT DYNAMIC RAM MODULES