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参数资料
| 型号： | TMC2111AB2C1 |
| 厂商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分类： | DSP Peripheral |
| 英文描述： | 8-BIT, DSP-PIPELINE REGISTER, CDIP24 |
| 封装： | 0.300 INCH, CERDIP-24 |
| 文件页数： | 6/12页 |
| 文件大小： | 69K |
| 代理商： | TMC2111AB2C1 |
PRODUCT SPECIFICATION
TMC2011A/2111A
3
Pin Descriptions – TMC2011A
Pin Name
Pin Number
Pin Function Description
DIP
PLCC
Power
VDD
78
Supply Voltage. The TMC2011A and operates from a single +5V supply.
All power and ground lines must be connected.
GND
18
21,22
Ground. The TMC2011A operates from a single +5V supply. All power
and ground lines must be connected.
Data Inputs
DI7-0
12,11,10,
9,4,3,2,1
14,13,12,
10,5,4,3,2
Data Input. Eight inputs are provided for the data, which pass through the
shift register unchanged. The eight inputs on the TMC2011A are divided
into two groups of four bits to allow mixed delay operation. The lengths of
these two groups are different when the Mode Control (MC) is HIGH (see
Table 1). When MC is LOW both groups have equal delays.
Data Outputs
DO7-0
13,14,15,
16,21,22,
23,24
15,16,17,
18,26,27,
28,1
Data Output. The outputs of the shift register are delayed relative to the
input signals. The amount of the delay is programmable (see Table 1).
The outputs remain valid for a minimum of tHO nanoseconds after the
leading edge of CLK. This allow the data to be latched into circuits with
non-zero hold time requirements.
Controls
CLK
8
9
Master Clock. All inputs and outputs are synchronous and operate from a
single master clock. All operations occur on the rising edge of the master
clock.
L3-0
19,20,6,5
23,24,7,6
Length Select. The length select input is used to determine the register
delay of the TMC2011A. This input is registered and affects the output tDO
after the clock edge after it is input to the device (see Timing Diagram).
Delay lengths are specified in Table 1.
MC
17
20
Mode Control. The Mode Control is used to select the special 4-bit wide
split mode. When HIGH, the delay on DO7-4 is fixed at 18 stages, while
DO3-0 have the delay specified by the length select. When MC is LOW, all
eight bits have equal delays as specified by the length select.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| TMC2111AN2C | 功能描述:视频 IC Shift Register Variable Length RoHS:否 制造商:Fairchild Semiconductor 工作电源电压:5 V 电源电流:80 mA 最大工作温度:+ 85 C 封装 / 箱体:TSSOP-28 封装:Reel |
| TMC2111AN2C1 | 功能描述:视频 IC Shift Register Variable Length RoHS:否 制造商:Fairchild Semiconductor 工作电源电压:5 V 电源电流:80 mA 最大工作温度:+ 85 C 封装 / 箱体:TSSOP-28 封装:Reel |
| TMC2111AR3C | 功能描述:视频 IC Shift Register Variable Length RoHS:否 制造商:Fairchild Semiconductor 工作电源电压:5 V 电源电流:80 mA 最大工作温度:+ 85 C 封装 / 箱体:TSSOP-28 封装:Reel |
| TMC2111AR3C1 | 功能描述:视频 IC Shift Register Variable Length RoHS:否 制造商:Fairchild Semiconductor 工作电源电压:5 V 电源电流:80 mA 最大工作温度:+ 85 C 封装 / 箱体:TSSOP-28 封装:Reel |
| TMC211B2A | 制造商:Fairchild Semiconductor Corporation 功能描述: |
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