参数资料
型号: TMC2272AH5C2
厂商: FAIRCHILD SEMICONDUCTOR CORP
元件分类: DSP Peripheral
英文描述: 12-BIT, DSP-VIDEO IMAGING, PPGA120
封装: PLASTIC, PGA-120
文件页数: 17/20页
文件大小: 170K
代理商: TMC2272AH5C2
PRODUCT SPECIFICATION
TMC2272A
6
REV. 1.1.3 10/25/00
Figure 1. Impulse Response
Figure 2. Input/Output Timing
1
01
10
11
00
1.0
00
0
KAX + KBX + KCX
KAY + KBY + KCY
KAZ + KBZ + KCZ
(K_X)
(K_Y)
(K_Z)
00
CLK
CWSEL1,0
KA, KB, KC
DATA IN A, B, C
X OUT
Y OUT
23
4
5
678
tCY
tS tH
tHO
tD
PREVIOUS
NEW
tPWL
tPWH
1
CLK
CWSEL1,0
KA, KB, KC
X, Y, Z
23
4
5
Numeric Format and Overow
Table 2 shows the binary weightings of the input and output ports
of the TMC2272A. Although the internal sums of products
could grow to 23 bits, the outputs X, Y, and Z are rounded to
yield 12-bit integer words. Thus the output format is identical
to the input data format. Bit weighting is easily adjusted by
applying the same scaling correction factor to both input and
output data words.
As shown in Table 2, the TMC2272A’s matched input and
output data formats accommodate 0dB (unity) gain. There-
fore the user must be aware of input conditions that could lead
to numeric overflow. Maximum input data and coefficient
word sizes must be taken into account with the specific trans-
lation performed to ensure that no overflow occurs.
Use with Fewer than 12 Bits
The TMC2272A can be configured to provide several format
and overflow options when used in systems with fewer than
12 bits of resolution. An 8-bit system will be used as an ex-
ample, however these concepts apply to any other word width.
The most apparent mode of operation is to left justify the in-
coming data and to ground the unused input LSBs. Hoever,
the outputs will still be rounded to the least significant bit of
the TMC2272A, having little if any effect on the top 8 bits
actually used. Because the TMC2272A carries out all calcu-
lations to full precision, the preferred mode of operation is to
right jusitfy and sign extend the data as shown in Figure 3.
Since all the LSBs are used, the desired output will be rounded
correctly, and overflow will be accommodated by bits 7
through 10.
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