参数资料
型号: TMDSEVM355
厂商: Texas Instruments
文件页数: 15/88页
文件大小: 0K
描述: TMDSEVM355
设计资源: DM355 EVM Schematics
标准包装: 1
系列: DaVinci™
类型: MCU
适用于相关产品: TMS320DM355
所含物品: 板,电池,线缆,CD,电源,遥控
相关产品: 296-32766-ND - IC DSP W/FLASH 16KX16 100-LQFP
296-18337-ND - IC DSP W/FLASH 64KX16 100-BGA
296-18336-ND - IC DSP W/FLASH 64KX16 100-BGA
296-18335-ND - IC DSP W/FLASH 64KX16 100-LQFP
296-18334-ND - IC DSP W/FLASH 64KX16 100-LQFP
296-18333-ND - IC DSP W/FLASH 64KX16 100-BGA
296-18332-ND - IC DSP W/FLASH 64KX16 100-BGA
Spectrum Digital, Inc
1.4 Memory Map
The DM355 processor has a byte addressable address space. There are some
limitations to byte addressing which are determined by peripheral interconnection to the
DM355 device. Program code and data can be placed anywhere in the unified address
space. Addresses are multiple sizes depending on hardware implementation. Refer to
the appropriate device data sheets for more details.
The memory map shows the address space of a generic DM355 processor on the left
with specific details of how each region is used on the right. By default, the internal
memory sits at the beginning of the address space. Portions of memory can be
remapped in software as L2 cache rather than fixed RAM.
The part incorporates a dual EMIF interface. One dedicated EMIF directly interfaces to
the DDR2 memory. The other EMIF has 2 separate addressable regions called chip
enable spaces (CE0 & CE1). The NAND Flash and ethernet controller are mapped into
these chip enable spaces.
DM355 EVM
Address
Memory Map Address Space
0x00000000
ARM Instruction RAM
0x00008000
ARM Instruction ROM
0x00010000
ARM RAM (Data)
0x00020000
Reserved
0x02000000
CE0
0x04000000
CE1
0x06000000
Reserved
0x80000000
DDR
0x8FFFFFFF
Figure 1-3, Memory Map, DM355 EVM
1-5
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