参数资料
型号: TPA3101D2PHPR
厂商: TEXAS INSTRUMENTS INC
元件分类: 音频/视频放大
英文描述: 10 W, 2 CHANNEL, AUDIO AMPLIFIER, PQFP48
封装: 7 X 7 MM, GREEN, PLASTIC, HTQFP-48
文件页数: 20/41页
文件大小: 1073K
代理商: TPA3101D2PHPR
www.ti.com
SLOS473C – DECEMBER 2005 – REVISED SEPTEMBER 2007
SHORT-CIRCUIT PROTECTION AND AUTOMATIC RECOVERY FEATURE
The TPA3101D2 has short-circuit protection circuitry on the outputs that prevents damage to the device during
output-to-output shorts, output-to-GND shorts, and output-to-VCC shorts. When a short circuit is detected on the
outputs, the part immediately disables the output drive. This is a latched fault and must be reset by cycling the
voltage on the SHUTDOWN pin or MUTE pin. This clears the short-circuit flag and allows for normal operation if
the short was removed. If the short was not removed, the protection circuitry again activates.
The FAULT terminal can be used for automatic recovery from a short-circuit event, or used to monitor the status
with an external GPIO. For automatic recovery from a short-circuit event, connect the FAULT terminal directly to
the MUTE terminal. When a short-circuit event occurs, the FAULT terminal transitions high indicating a
short-circuit has been detected. When directly connected to MUTE, the MUTE terminal transitions high, and
clears the internal fault flag. This causes the FAULT terminal to cycle low, and normal device operation resumes
if the short-circuit is removed from the output. If a short remains at the output, the cycle continues until the short
is removed. If external MUTE control is desired, and automatic recovery from a short-circuit event is also desired,
an OR gate can be used to combine the functionality of the FAULT output and external MUTE control, see
THERMAL PROTECTION
Thermal protection on the TPA3101D2 prevents damage to the device when the internal die temperature
exceeds 150°C. There is a ±15°C tolerance on this trip point from device to device. Once the die temperature
exceeds the thermal set point, the device enters into the shutdown state and the outputs are disabled. This is not
a latched fault. The thermal fault is cleared once the temperature of the die is reduced by 30°C. The device
begins normal operation at this point with no external system interaction.
PRINTED-CIRCUIT BOARD (PCB) LAYOUT
Because the TPA3101D2 is a class-D amplifier that switches at a high frequency, the layout of the printed-circuit
board (PCB) should be optimized according to the following guidelines for the best possible performance.
Decoupling capacitors—The high-frequency 1F decoupling capacitors should be placed as close to the
PVCC (pins 26, 27, 34, and 35) and AVCC (pin 48) terminals as possible. The VBYP (pin 16) capacitor,
VREG (pin 15) capacitor, and VCLAMP (pins 30 and 31) capacitor should also be placed as close to the
device as possible. Large (220 F or greater) bulk power supply decoupling capacitors should be placed near
the TPA3101D2 on the PVCCL, PVCCR, and AVCC terminals.
Grounding—The AVCC (pin 48) decoupling capacitor, VREG (pin 15) capacitor, VBYP (pin 16) capacitor, and
ROSC (pin 14) resistor should each be grounded to analog ground (AGND, pin 17). The PVCC decoupling
capacitors and VCLAMP capacitors should each be grounded to power ground (PGND, pins 28, 29, 32, and
33). Analog ground and power ground should be connected at the thermal pad, which should be used as a
central ground connection or star ground for the TPA3101D2.
Output filter—The ferrite EMI filter (Figure 29) should be placed as close to the output terminals as possible
for the best EMI performance. The LC filter (Figure 27 and Figure 28) should be placed close to the outputs.
The capacitors used in both the ferrite and LC filters should be grounded to power ground. If both filters are
used, the LC filter should be placed first, following the outputs.
Thermal Pad—The thermal pad must be soldered to the PCB for proper thermal performance and optimal
reliability. The dimensions of the thermal pad and thermal land should be 5,1 mm by 5,1 mm. Five rows of
solid vias (five vias per row, 0,3302 mm or 13 mils diameter) should be equally spaced underneath the
thermal land. The vias should connect to a solid copper plane, either on an internal layer or on the bottom
layer of the PCB. The vias must be solid vias, not thermal relief or webbed vias. See TI Technical Briefs
SCBA017D and SLUA271 for more information about using the QFN thermal pad. See TI Technical Briefs
SLMA002 for more information about using the HTQFP thermal pad. For recommended PCB footprints, see
figures at the end of this data sheet.
For an example layout, see the TPA3101D2 Evaluation Module (TPA3101D2EVM) User Manual, (SLOU179).
Both the EVM user manual and the thermal pad application note are available on the TI Web site at
http://www.ti.com.
Copyright 2005–2007, Texas Instruments Incorporated
27
Product Folder Link(s): TPA3101D2
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