参数资料
型号: TPA6130A2RTJR
厂商: TEXAS INSTRUMENTS INC
元件分类: 音频控制
英文描述: 2 CHANNEL(S), VOLUME CONTROL CIRCUIT, PQCC20
封装: 4 X 4 MM, GREEN, PLASTIC, QFN-20
文件页数: 9/28页
文件大小: 1198K
代理商: TPA6130A2RTJR
www.ti.com
A6
A0
ACK
Acknowledge
I2CDeviceAddressand
Read/WriteBit
R/W
A6
A0
R/W ACK
A0 ACK
D7
D0
ACK
Start
Condition
Stop
Condition
Acknowledge
LastDataByte
ACK
FirstDataByte
RepeatStart
Condition
Not
Acknowledge
I2CDeviceAddressand
Read/WriteBit
Register
OtherDataBytes
A7
A6
A5
D7
D0 ACK
Acknowledge
D7
D0
Register Map
SLOS488B – NOVEMBER 2006 – REVISED FEBRUARY 2008
Figure 41. Multiple-Byte Read Transfer
Table 1. Register Map
Register
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
1
HP_EN_L
HP_EN_R
Mode[1]
Mode[0]
Reserved
Thermal
SWS
2
Mute_L
Mute_R
Volume[5]
Volume[4]
Volume[3]
Volume[2]
Volume[1]
Volume[0]
3
Reserved
HiZ_L
HiZ_R
4
Reserved
RFT
Version[3]
Version[2]
Version[1]
Version[0]
5
RFT
6
RFT
7
RFT
8
RFT
Bits labeled "Reserved" are reserved for future enhancements. They may not be written to. When read, they will
show a "0" value.
Bits labeled "RFT" are reserved for TI testing. Under no circumstances must any data be written to these
registers. Writing to these bits may change the function of the device, or cause complete failure. If read, these
bits may assume any value.
Control Register (Address: 1)
BIT
7
6
5
4
3
2
1
0
Function
HP_EN_L
HP_EN_R
Mode[1]
Mode[0]
Reserved
Thermal
SWS
Reset Value
0
HP_EN_L
Enable bit for the left-channel amplifier. Amplifier is active when bit is high.
HP_EN_R
Enable bit for the right-channel amplifier. Amplifier is active when bit is high.
Mode[1:0]
Mode bits Mode[1] and Mode[0] select one of three modes of operation. 00 is stereo headphone
mode. 01 is dual mono headphone mode. 10 is bridge-tied load mode.
Reserved
These bits are reserved for future enhancements. They may not be written to. When read they will
read as zero.
Thermal
A 1 on this bit indicates a thermal shutdown was initiated by the hardware. When the temperature
drops to safe levels, the device will start to operate again, regardless of bit status. This bit is
clear-on-read.
SWS
Software shutdown control. When the bit is one, the device is in software shutdown. When the bit
is low, the charge-pump is active. SWS must be low for normal operation.
Copyright 2006–2008, Texas Instruments Incorporated
17
Product Folder Link(s): TPA6130A2
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