参数资料
型号: TPS2228PWPG4
厂商: TEXAS INSTRUMENTS INC
元件分类: 电源管理
英文描述: 3-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO20
封装: GREEN, PLASTIC, HTSSOP-20
文件页数: 9/30页
文件大小: 696K
代理商: TPS2228PWPG4
TPS2228
TPS2221
SLVS419A MAY 2002 REVISED SEPTEMBER 2002
www.ti.com
17
SHUTDOWN MODE
In the shutdown mode, each of the VCC and VPP/VCORE
outputs is forced to a high-impedance state (Hi-Z). In this
mode, the chip quiescent current is reduced to conserve
battery power.
POWER SUPPLY CONSIDERATIONS
The TPS2228/2221 power interface switch has multiple
pins for each of its power inputs and for the switched VCC
outputs. The two 1.8VIN pins must be connected together
externally. It is recommended that all input and output
power pins be parallel connected for optimum operation.
To increase the noise immunity of the TPS2228/2221
power interface switch, the power supply inputs should
have a minimum of 1
F electrolytic or tantalum bypass
capacitor connected in parallel with a 0.047
F to 0.1 F
ceramic capacitor. It is strongly recommended that the
switched outputs be bypassed with a 0.1
F or larger
ceramic capacitor. Doing so improves the immunity of the
TPS2228/2221 power interface switch to electrostatic
discharge (ESD). Care should be taken to minimize the
inductance of PCB traces between the TPS2228/2221
power interface switch and the load.
RESET
To ensure that cards are in a known state after power
brownouts or system initialization, the PC cards should be
reset at the same time via the host, by applying low
impedance paths from VCC and VPP/VCORE terminals to
ground. A low-impedance output state allows discharging
of
residual
voltage
remaining
on
PC
card
filter
capacitance, permitting the system (host and PC cards) to
be powered up concurrently. The active low RESET input
will program all outputs to 0 V. The TPS2228 power
interface switch remains in the low-impedance output
state until the signal is deasserted and new data is
received. For the TPS2228, the input serial data cannot be
latched during reset mode.
CALCULATING JUNCTION TEMPERATURE
The switch resistance, rDS(on), is dependent on the
junction temperature, TJ, of the die. The junction
temperature is dependent on both rDS(on) and the current
through the switch. To calculate TJ, first find rDS(on) from
Figures 10 through 14 using an initial temperature
estimate about 50
°C above ambient. Then calculate the
power dissipation for each switch, using the formula:
P
D +
r
DS(on)
I2
Next, sum the power dissipation and calculate the junction
temperature:
T
J + S
P
D
RqJA ) TA
Where RθJA is the inverse of the derating factor in the
dissipation rating table.
Compare the calculated junction temperature with the
initial temperature estimate. If the temperatures are not
within a few degrees of each other, recalculate using the
calculated temperature as the initial estimate.
LOGIC INPUTS AND OUTPUTS
For the TPS2228, the serial interface consists of DATA,
CLOCK, and LATCH signals. The data is clocked in on the
positive leading edge of the clock (see Figure 2). The 11-bit
(D0D10) serial data word is loaded during the positive
edge of the latch signal. The latch signal should occur
before the next positive leading edge of the clock.
The serial interface of the TPS2228 power interface switch
is designed to be compatible with serial-interface PCMCIA
controllers and current PCMCIA and Japan Electronic
Industry Development Association (JEIDA) standards.
For the TPS2221, the parallel interface consists of four bits
(D3:D0). These four bits must be driven continuously to
select the desired voltage outputs based on the input bit
pattern. During power up, these inputs can be connected
to an external pulldown resistor to ensure that the outputs
are at zero volts, especially if the device driving these
inputs is in a high impedance state while initializing.
An overcurrent output (OC) is provided to indicate an
overcurrent or over-temperature condition in any of the
VCC and VPP/VCORE outputs as previously discussed.
ESD PROTECTION
All TPS2228/2221 power interface switch inputs and
outputs incorporate ESD-protection circuitry designed to
withstand a 2-kV human-body-model discharge as defined
in MIL-STD-883C, Method 3015. The VCC and VPP/
VCORE outputs can be exposed to potentially higher
discharges from the external environment through the PC
card connector. Bypassing the outputs with 0.1-
F
capacitors protects the devices from discharges up to
10 kV.
相关PDF资料
PDF描述
TPS2221PWP 3-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO14
TPS2228PWPR 3-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO20
TPS2228DBRG4 3-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO30
TPS2223PWPR 3-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO24
TPS2223PWPG4 3-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO24
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