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参数资料
| 型号： | TPS2236DAP |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 电源管理 |
| 英文描述： | 2-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO32 |
| 封装： | GREEN, PLASTIC, HTSSOP-32 |
| 文件页数： | 39/40页 |
| 文件大小： | 1410K |
| 代理商： | TPS2236DAP |
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SLVS536J – JULY 2004 – REVISED SEPTEMBER 2009.................................................................................................................................................. www.ti.com
TERMINAL FUNCTIONS
TERMINAL
TPS2231
TPS2236
I/O
DESCRIPTION
NAME
NO.
NAME
NO.
PW
PWP
RGP
DAP
3.3VIN
4, 5
5, 6
2
3.3VIN
8, 9
I
3.3-V input for 3.3VOUT
1.5VIN
15, 16
18, 19
12
1.5VIN
24, 25
I
1.5-V input for 1.5VOUT
AUXIN
18
21
17
AUXIN
15
I
AUX input for AUXOUT and chip power
GND
10
11
7
GND
21
Ground
Switched output that delivers 0 V, 3.3 V or high impedance to
3.3VOUT
6, 7
7, 8
3
3.3VOUT1
7
O
card
Switched output that delivers 0 V, 1.5 V or high impedance to
1.5VOUT
13, 14
16, 17
11
1.5VOUT1
26
O
card
Switched output that delivers 0 V, AUX or high impedance to
AUXOUT
17
20
15
AUXOUT1
14
O
card
Switched output that delivers 0 V, 3.3 V or high impedance to
3.3VOUT2
10
O
card
Switched output that delivers 0 V, 1.5 V or high impedance to
1.5VOUT2
23
O
card
Switched output that delivers 0 V, AUX or high impedance to
AUXOUT2
16
O
card
System Reset input – active low, logic level signal. Internally
SYSRST
1
2
6
SYSRST
30
I
pulled up to AUXIN.
Card Present input for PCI Express cards. Internally pulled up to
CPPE
12
15
10
CPPE1
1
I
AUXIN
CPUSB
11
14
9
CPUSB1
3
I
Card Present input for USB cards. Internally pulled up to AUXIN.
Card Present input for PCI Express cards. Internally pulled up to
CPPE2
2
I
AUXIN.
CPUSB2
6
I
Card Present input for USB cards. Internally pulled up to AUXIN.
PERST
8
9
8
PERST1
13
O
A logic level power good to slot 0 (with delay)
PERST2
11
O
A logic level power good to slot 1 (with delay)
Shutdown input – active low, logic level signal. Internally pulled
SHDN
2
3
20
SHDN1
17
I
up to AUXIN.
Shutdown input – active low, logic level signal. Internally pulled
SHDN2
18
I
up to AUXIN.
Standby input – active low, logic level signal. Internally pulled up
STBY
3
4
1
STBY1
28
I
to AUXIN.
Standby input – active low, logic level signal. Internally pulled up
STBY2
27
I
to AUXIN.
Reference Clock Enable signal. As an output, a logic level power
good to host for slot 0 (no delay – open drain). As an input, if
RCLKEN
19
22
18
RCLKEN1
32
I/O
kept inactive (low) by the host, prevents PERST from being
de-asserted. Internally pulled up to AUXIN.
Reference Clock Enable signal. As an output, a logic level power
good to host for slot 1 (no delay – open drain). As an input, if
RCLKEN2
31
I/O
kept inactive (low) by the host, prevents PERST from being
de-asserted. Internally pulled up to AUXIN.
OC
20
23
19
OC1
19
O
Overcurrent status output for slot 0 (open drain)
OC2
20
O
Overcurrent status output for slot 1 (open drain)
1, 10,
4, 5,
NC
9
12, 13,
13, 14,
NC
12, 22,
No connection
24
16
29
8
Copyright 2004–2009, Texas Instruments Incorporated
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