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参数资料
| 型号： | TPS2390DGKG4 |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 电源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8 |
| 封装： | GREEN, PLASTIC, MSOP-8 |
| 文件页数： | 2/20页 |
| 文件大小： | 497K |
| 代理商： | TPS2390DGKG4 |
TPS2390
TPS2391
SLUS471D JUNE 2002 REVISED JANUARY 2008
10
www.ti.com
APPLICATION INFORMATION
When a plug-in module or printed circuit card is inserted into a live chassis slot, discharged supply bulk
capacitance on the board can draw huge transient currents from the system supplies. Without some form of
inrush limiting, these currents can reach peak magnitudes ranging up to several hundred amps, particularly in
high-voltage systems. Such large transients can damage connector pins, PCB etch, and plug-in and supply
components. In addition, current spikes can cause voltage droops on the power distribution bus, causing other
boards in the system to reset.
The TPS2390 and TPS2391 are hot swap power managers designed to limit these peaks to preset levels, as
well as control the slew rate (di/dt) at which charging current ramps to the programmed limit. These devices use
an external N-Channel pass FET and sense element to provide closed-loop control of current sourced to the
load. Input supply undervoltage lockout (UVLO) protection allows hot swap circuits to turn on automatically with
the application of power, or to be controlled with a system command via the EN input. External capacitors control
both the current ramp rate, and the timeout period for load voltage ramping. In addition, an internal overload
comparator provides circuit breaker protection against shorts occurring during steady-state (post-turn-on)
operation of the card.
The TPS2390 and TPS2391 operate directly from the input supply (nominal 48 VDC rail). The VIN pin
connects to the negative voltage rail, and the RTN pin connects to the supply return. Internal regulators convert
input power to the supply levels required by the device circuitry. An input UVLO circuit holds the GATE output
low until the supply voltage reaches a nominal 30-V level. A second comparator monitors the EN input; this pin
must be pulled above the 1.4-V enable threshold to turn on power to the load.
Once enabled, and when the input supply is above the UVLO threshold, the GATE pull-down is removed, the
linear control amplifier (LCA) is enabled, and a large discharge device in the RAMP CONTROL block is turned
off. Subsequently, a small current source is now able to charge an external capacitor connected to the IRAMP
pin. This results in a linear voltage ramp at IRAMP. The voltage ramp on the capacitor actually has two discrete
slopes. As shown in Figure 17, charging current is supplied from either of two sources. Initially at turn-on, the
600-nA source is selected, to provide a slow turn-on rate. This slow turn-on helps ensure that the LCA is pulled
out of saturation, and is slewing to the voltage at its non-inverting input before normal rate load charging is
allowed. This mechanism helps reduce current steps at turn-on. Once the voltage at the IRAMP pin reaches
approximately 0.5 V, an internal comparator deasserts the SLOW signal, and the 10-
A source is selected for
the remainder of the ramp period.
The voltage at IRAMP is divided down by a factor of 100, and applied to the non-inverting input of the LCA. Load
current magnitude information at the ISENS pin is applied to the inverting input. This voltage is developed by
connecting the current sense resistor between ISENS and VIN. The LCA slews the gate of the external pass
FET to force the ISENS voltage to track the divided down IRAMP voltage. Consequently, the load current slew
rate tracks the linear voltage ramp at the IRAMP pin, producing a linear di/dt of the load current. The IRAMP
capacitor is charged to about 6.5 V; however, the LCA input is clamped at 40 mV. Therefore, the current sourced
to the load during turn-on is limited to a value given by IMAX
≤ 40 mV/RSENSE, where RSENSE is the value of
the sense resistor.
The resultant load current, regulated by the controller, charges the module’s input bulk capacitance in a safe
fashion. Under normal conditions, this capacitance eventually charges up to the dc input potential. At this point,
the load demand drops off, and the voltage at ISENS decreases. The LCA now drives the GATE output to its
supply rail. The 14-V typical output level ensures sufficient overdrive to fully enhance the external FET, while
not exceeding the typical 20-V VGS rating of common N-Channel power FETs.
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| TPS2390DGKRG4 | 功能描述:热插拔功率分布 Simple-48V Hot Swap Controller RoHS:否 制造商:Texas Instruments 产品:Controllers & Switches 电流限制: 电源电压-最大:7 V 电源电压-最小:- 0.3 V 工作温度范围: 功率耗散: 安装风格:SMD/SMT 封装 / 箱体:MSOP-8 封装:Tube |
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| TPS2391DGK | 功能描述:热插拔功率分布 Simple-48V Hot Swap Controller RoHS:否 制造商:Texas Instruments 产品:Controllers & Switches 电流限制: 电源电压-最大:7 V 电源电压-最小:- 0.3 V 工作温度范围: 功率耗散: 安装风格:SMD/SMT 封装 / 箱体:MSOP-8 封装:Tube |
| TPS2391DGKG4 | 功能描述:热插拔功率分布 Simple-48V Hot Swap Controller RoHS:否 制造商:Texas Instruments 产品:Controllers & Switches 电流限制: 电源电压-最大:7 V 电源电压-最小:- 0.3 V 工作温度范围: 功率耗散: 安装风格:SMD/SMT 封装 / 箱体:MSOP-8 封装:Tube |
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