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参数资料
| 型号： | TPS386060RGPT |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 电源管理 |
| 英文描述： | 4-CHANNEL POWER SUPPLY MANAGEMENT CKT, PQCC20 |
| 封装： | 4 X 4 MM, PLASTIC, QFN-20 |
| 文件页数： | 27/31页 |
| 文件大小： | 681K |
| 代理商： | TPS386060RGPT |
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SBVS105B
– SEPTEMBER 2009 – REVISED MARCH 2011
PIN ASSIGNMENTS (continued)
PIN
NAME
NO.
DESCRIPTION
TPS386000
RESET1
15
Active low reset output of SVS-1
RESETn is an open-drain output pin. When
RESETn is asserted, this pin remains in a
RESET2
16
Active low reset output of SVS-2
low-impedance state. When RESETn is released,
RESET3
17
Active low reset output of SVS-3
this pin goes to a high-impedance state after the
delay time programmed by CTn.
RESET4
18
Active low reset output of SVS-4
Watchdog timer output. This is an open-drain output pin. When WDT times out, this pin goes to a
WDO
19
low-impedance state to GND. If there is no WDT timeout, this pin stays in a high-impedance state.
TPS386020
RESET1
15
Active high reset output of SVS-1
RESETn is open-drain output pin. When RESETn
is asserted, this pin remains in a high impedance
RESET2
16
Active high reset output of SVS-2
state. When RESETn is released, this pin goes to
RESET3
17
Active high reset output of SVS-3
a low-impedance state after the delay time
programmed by CTn.
RESET4
18
Active high reset output of SVS-4
Watchdog timer output. This is an open-drain output pin. When WDT times out, this pin goes to a
WDO
19
high-impedance state. If there is no WDT timeout, this pin stays in a low-impedance state to GND.
TPS386040
RESET1
15
Active low reset output of SVS-1
RESETn is a push-pull logic buffer output pin.
When RESETn is asserted, this pin remains logic
RESET2
16
Active low reset output of SVS-2
low. When RESETn is released, this pin goes to
RESET3
17
Active low reset output of SVS-3
logic high after the delay time programmed by
CTn.
RESET4
18
Active low reset output of SVS-4
Watchdog timer output. This is a push-pull output pin. When WDT times out, this pin goes to logic low.
WDO
19
If there is no WDT timeout, this pin stays in logic high.
TPS386060
RESET1
15
Active high reset output of SVS-1
RESETn is a push-pull logic buffer output pin.
RESET2
16
Active high reset output of SVS-2
When RESETn is asserted, this pin remains logic
high. When RESETn is released, this pin goes to
RESET3
17
Active high reset output of SVS-3
logic low after the delay time programmed by CTn.
RESET4
18
Active high reset output of SVS-4
Watchdog timer output. This is a push-pull output pin. When WDT times out, this pin goes to logic high.
WDO
19
If there is no WDT timeout, this pin stays in logic low.
Copyright
2009–2011, Texas Instruments Incorporated
5
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