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参数资料
| 型号： | TPS40422RHAT |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 稳压器 |
| 英文描述： | DUAL SWITCHING CONTROLLER, 1000 kHz SWITCHING FREQ-MAX, QCC40 |
| 封装： | 6 X 6 MM, VQFN-40 |
| 文件页数： | 11/12页 |
| 文件大小： | 205K |
| 代理商： | TPS40422RHAT |
PRODUCTPREVIEW
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40
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32
31
D
A
T
A
C
L
K
S
M
B
A
L
R
T
G
S
N
S
2
V
S
N
S
2
T
S
N
S
2
C
S
2
N
C
S
2
P
G
2
B
O
T
2
S
Y
N
C
D
IF
F
O
1
G
S
N
S
1
V
S
N
S
1
T
S
N
S
1
C
S
1
N
C
S
1
P
G
1
B
P
3
V
D
RT
FB1
COMP1
CNTL1
CNTL2
AGND
COMP2
FB2
ADDR1
ADDR0
TPS40422
BOOT1
HDRV1
SW1
LDRV1
PGND
BP6
BPEXT
LDRV2
SW2
HDRV2
SLUSAQ4
– OCTOBER 2011
DEVICE INFORMATION
PIN FUNCTIONS
PIN
NO.
I/O
DESCRIPTION
Low-order address pin for PMBus address configuration. One of eight resistor values must be connected
ADDR0
10
I
from this pin to AGND to select the low-order octal digit in the PMBus address.
High-order address pin for PMBus address configuration. One of eight resistor values must be
ADDR1
9
I
connected from this pin to AGND to select the low-order octal digit in the PMBus address.
Low-noise ground connection to the controller. Connections should be arranged so that power level
AGND
6
—
currents do not flow through the AGND path.
Bootstrapped supply for the high-side FET driver for channel 1 (CH1). Connect a capacitor (100 nF
BOOT1
30
I
typical) from BOOT1 to SW1 pin.
Bootstrapped supply for the high-side FET driver for channel 2 (CH2). Connect a capacitor (100 nF
BOOT2
20
I
typical) from BOOT2 to SW2 pin.
Output bypass for the internal 3.3-V regulator. Connect a 100 nF or larger capacitor from this pin to
BP3
32
O
AGND.
Output bypass for the internal 6.5-V regulator. Connect a low ESR, 1
F or larger ceramic capacitor from
BP6
25
O
this pin to PGND.
External voltage input for BP6 switchover function. Connect a 100 nF or larger capacitor from this pin to
BPEXT
24
I
PGND.
CLK
12
I
Clock input for the PMBus interface. Pull up to 3.3 V with a resistor.
CNTL1
4
I
Logic level input which controls startup and shutdown of CH1, determined by PMBus options.
CNTL2
5
I
Logic level input which controls startup and shutdown of CH2, determined by PMBus options.
COMP1
3
O
Output of the error amplifier for CH1 and connection node for loop feedback components.
Output of the error amplifier for CH2 and connection node for loop feedback components. For two-phase
COMP2
7
O
operation, use COMP1 for loop feedback and connect COMP1 to COMP2.
CS1N
35
I
Negative terminal of current sense amplifier for CH1.
CS2N
17
I
Negative terminal of current sense amplifier for CH2.
CS1P
34
I
Positive terminal of current sense amplifier for CH1.
CS2P
18
I
Positive terminal of current sense amplifier for CH2.
DATA
11
I/O
Data input/output for the PMBus interface. Pull up to 3.3 V with a resistor.
DIFFO1
39
O
Output of the differential remote sense amplifier for CH1.
8
Copyright
2011, Texas Instruments Incorporated
Product Folder Link(s) :TPS40422
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