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| 型号： | TPS5103IDBG4 |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 稳压器 |
| 英文描述： | 3 A SWITCHING CONTROLLER, 500 kHz SWITCHING FREQ-MAX, PDSO20 |
| 封装： | GREEN, PLASTIC, SSOP-20 |
| 文件页数： | 20/40页 |
| 文件大小： | 1225K |
| 代理商： | TPS5103IDBG4 |
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TPS5103
MULTIPLE MODE SYNCHRONOUS DC/DC CONTROLLER
SLVS240A – SEPTEMBER 1999 – REVISED MAY 2001
27
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION INFORMATION
synchronization (continued)
TPS5103
CT
RT
740 mV
Figure 46. Triangle-Wave Synchronization
D Square-wave synchronization
It can be seen that RT and CT are removed from the circuit. Therefore, two components are saved. This method
is good for the synchronization between two controllers. If the controller needs to be synchronized with a digital
circuit such as a DSP, usually the square-type clock signal is used. The configuration shown in Figure 47 is for
this type of application.
TPS5103
CT
RT
Figure 47. Square-Wave Synchronization
An external resistor is added into the circuit, but RT is still removed. CT is kept to be a part of the RC circuit
generating the triangle waveform for the controller. Assuming the peak value of the square is known, the resistor
and the capacitor can be adjusted to achieve the correct peak-to-peak value and the offset value.
layout guidelines
Good power supply results will only occur when care is given to proper design and layout. Layout will affect noise
pickup and generation, and can cause a good design to perform with less than expected results. With a range
of currents from milliamps to tens or even hundreds of amps, good power-supply layout is much more difficult
than most general PCB designs. The general design should proceed from the switching node to the output, then
back to the driver section and, finally, place the low-level components. Below are several specific points to
consider before layout of a TPS5103 design begins.
D All sensitive analog components should be referenced to ANAGND. These include components connected
to VREF5, Vref, INV, LH, and COMP .
D Analog ground and drive ground should be isolated as much as possible. Ideally, analog ground will connect
to the ground side of the bulk storage capacitors on VO, and drive ground will connect to the main ground
plane close to the source of the low-side FET.
D Connections from the drivers to the gate of the power FETs should be as short and wide as possible to
reduce stray inductance. This becomes more critical if external gate resistors are not being used.
D The bypass capacitor for VCC should be placed close to the TPS5103.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| TPS5103IDBR | 功能描述:DC/DC 开关控制器 Synch Buck Cntrlr RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
| TPS5103IDBRG4 | 功能描述:DC/DC 开关控制器 Synch Buck Cntrlr RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
| TPS5110 | 制造商:TI 制造商全称:Texas Instruments 功能描述:3-A SINK/ SOURCE DDR TERMINATION REGULATOR |
| TPS51100 | 制造商:TI 制造商全称:Texas Instruments 功能描述:3-A SINK/SOURCE DDR TERMINATION REGULATOR |
| TPS51100_07 | 制造商:TI 制造商全称:Texas Instruments 功能描述:3-A SINK/SOURCE DDR TERMINATION REGULATOR |
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