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| 型号： | TPS51100EVM-001 |
| 厂商： | Texas Instruments |
| 文件页数： | 1/22页 |
| 文件大小： | 0K |
| 描述： | EVALUATION MODULE FOR TPS51100 |
| 标准包装： | 1 |
| 每 IC 通道数： | 1 - 单 |
| 输出电压： | 1.2 ~ 3.6V |
| 电流 - 输出： | 2A |
| 输入电压： | 4.75 ~ 5.25 V |
| 稳压器类型： | 正，可调式 |
| 工作温度： | -40°C ~ 85°C |
| 板类型： | 完全填充 |
| 已供物品： | 板 |
| 已用 IC / 零件： | TPS51100 |
| 产品目录页面： | 1024 (CN2011-ZH PDF) |
| 相关产品： | 296-18638-6-ND - IC DDR SYNC BUCK CTRL REF 24QFN 296-23595-1-ND - IC REG 3A SINK/SOURCE SSR 10MSOP TPS51116RGETG4-ND - IC DDR SYNC BUCK CTRL REF 24-QFN TPS51116RGERG4-ND - IC DDR SYNC BUCK CTRL REF 24-QFN 296-26973-2-ND - IC DDR SYNC BUCK CTRL REF 24-QFN TPS51116PWPRG4-ND - IC DDR SYNC BUC CTRL REF20HTSSOP 296-26972-2-ND - IC DDR SYNC BUC CTRL REF20HTSSOP TPS51116PWPG4-ND - IC DDR SYNC BUC CTRL REF20HTSSOP TPS51100DGQRG4-ND - IC REG 3A SINK/SOURCE DDR 10MSOP 296-23595-2-ND - IC REG 3A SINK/SOURCE SSR 10MSOP 更多... |
| 其它名称： | 296-17268 |
SLUS600D – APRIL 2004 – REVISED MAY 2012
3-A SINK/SOURCE DDR TERMINATION REGULATOR
Check for Samples: TPS51100
1
FEATURES
?
2
?
?
?
?
?
Input Voltage Range: 4.75 V to 5.25 V
VLDOIN Voltage Range: 1.2 V to 3.6 V
3-A Sink/Source Termination Regulator
Includes Droop Compensation
Requires Only 20- μ F Ceramic Output
Capacitance
Supports High-Z in S3 and Soft-Off in S5
1.2-V Input (VLDOIN) Helps Reduce Total
Power Dissipation
The TPS51100 is a 3-A sink/source tracking
termination regulator. It is specifically designed for
low-cost/low-external component count systems,
where space is a premium.
The TPS51100 maintains fast transient response,
only requiring 20 μ F (2 × 10 μ F) of ceramic output
capacitance. The TPS51100 supports remote sensing
functions and all features required to power the DDR
and DDR2 VTT bus termination according to the
JEDEC specification. The part also supports DDR3
VTT termination with VDDQ at 1.5 V (typ). In addition,
?
Integrated Divider Tracks 0.5 VDDQSNS for
the
TPS51100
includes
integrated
sleep-state
VTT and VTTREF
controls, placing VTT in high-Z in S3 (suspend to
?
?
?
Remote Sensing (VTTSNS)
±20-mV Accuracy for VTT and VTTREF
10-mA Buffered Reference (VTTREF)
RAM) and soft-off for VTT and VTTREF in S5
(suspend to disk). The TPS51100 is available in the
thermally efficient 10-pin MSOP PowerPAD?
package and is specified from –40°C to 85°C.
?
?
?
Built-In Soft-Start, UVLO and OCL
Thermal Shutdown
Supports JEDEC Specifications
T A
ORDERING INFORMATION
PLASTIC MSOP PowerPAD?
PACKAGE (DGQ) (1)
APPLICATIONS
?
DDR, DDR2, DDR3 Memory Termination
–40°C to 85°C
TPS51100DGQ
?
SSTL-2, SSTL-18 and HSTL Termination
(1)
The DGQ package is also available taped and reeled. Add an
R suffix to the device type (i.e., TPS51100DGQR). See the
TPS51100DGQ
application section of the data sheet for the PowerPAD
package drawing and layout information.
1
VDDQSNS
VIN 10
5V_IN
C1
2
VLDOIN
S5
9
S5
2 x 10 μF
3
VTT
GND
8
C2
0.1 μF
4
5
PGND
VTTSNS
S3
VTTREF
7
6
S3
VTTREF
Capacitor Manuf
Part Number
C1
C2
TDK
TDK
C2012JB0J106K
C1608JB1H104K
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
PowerPAD is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright ? 2004–2012, Texas Instruments Incorporated
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