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| 型号： | TPS53124RGET |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 稳压器 |
| 英文描述： | DUAL SWITCHING CONTROLLER, PQCC24 |
| 封装： | GREEN, PLASTIC, QFN-24 |
| 文件页数： | 6/22页 |
| 文件大小： | 656K |
| 代理商： | TPS53124RGET |
APPLICATION INFORMATION
Loop Compensation and External Parts Selection
Ref
R1
R2
Voltage Devider
Switching Modulator
PWM
Logic
control
Driver
DRVH
DRVL
Vin
Lx
ESR
Co
Vc
1
2
3
SW
O
f
ESR C
p
=
(3)
[
]
10
OUT
RIPPLE
FBx
V
mV
V
=
(4)
SLUS825B – FEBRUARY 2008 – REVISED MAY 2008 ..................................................................................................................................................... www.ti.com
A buck converter system using D-CAP Mode can be simplified as below.
Figure 12. Simplifying the Modulator
The output voltage is compared with internal reference voltage after divider resistors,R1 and R2. The PWM
comparator determines the timing to turn on top MOSFET. The gain and speed of the comparator is high enough
to keep the voltage at the beginning of each on cycle (or the end of off cycle) substantially constant. The dc
output voltage may have line regulation due to ripple amplitude that slightly increases as the input voltage
increase.
For the loop stability, the 0dB frequency, f0, defined below need to be lower than 1/3 of the switching frequency.
Although D-CAP Mode provides many advantages such as ease-of-use, minimum external components
configuration and extremely short response time, a sufficient amount of feedback signal needs to be provided by
external circuit to reduce jitter level. This is due to not employing an error amplifier in the loop. The required
signal level is approximately 10 mV at the comparing point(VFB terminal). This gives Vripples at the output node
becomes Equation 4. The output capacitor’s ESR should meet this requirement.
14
Copyright 2008, Texas Instruments Incorporated
Product Folder Link(s): TPS53124
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