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| 型号： | TPS54383PWPRG4 |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 稳压器 |
| 英文描述： | 7 A DUAL SWITCHING CONTROLLER, 375 kHz SWITCHING FREQ-MAX, PDSO14 |
| 封装： | GREEN, PLASTIC, HTSSOP-14 |
| 文件页数： | 2/58页 |
| 文件大小： | 1773K |
| 代理商： | TPS54383PWPRG4 |
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www.ti.com
SLUS774B – AUGUST 2007 – REVISED OCTOBER 2007
TERMINAL FUNCTIONS (continued)
TERMINAL
I/O
DESCRIPTION
NAME
NO.
This pin configures the output startup mode. If the SEQ pin is connected to BP, then when Output 2 is
enabled, Output 1 is allowed to start after Output 2 has reached regulation; that is, sequential startup
where Output 1 is slave to Output 2. If EN2 is allowed to go high after the outputs have been operating,
then both outputs are disabled immediately, and the output voltages decay according to the load that is
present. For this sequence configuration, tie EN1 to ground.
If the SEQ pin is connected to GND, then when Output 1 is enabled, Output 2 is allowed to start after
Output 1 has reached regulation; that is, sequential startup where Output 2 is slave to Output 1. If EN1
is allowed to go high after the outputs have been operating, then both outputs are disabled immediately,
SEQ
10
I
and the output voltages decay according to the load that is present. For this sequence configuration, tie
EN2 to ground.
If left floating, Output 1 and Output 2 start ratio-metrically when both outputs are enabled at the same
time. They will soft start at a rate determined by their final output voltage and enter regulation at the
same time. If the EN1 and EN2 pins are allowed to operate independently, then the two outputs also
operate independently
NOTE: An internal two resistor (150-k
each) divider connects BP to SEQ and to GND. See the
Sequence States table.
Source (switching) output for Output 1 PWM. A snubber is recommended to reduce ringing on this
SW1
3
O
node. See SW Node Ringing for further information.
Source (switching) output for Output 2 PWM. A snubber is recommended to reduce ringing on this
SW2
12
O
node. See SW Node Ringing for further information.
Thermal Pad
-
This pad must be tied externally to a ground plane and the GND pin.
10
Copyright 2007, Texas Instruments Incorporated
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