参数资料
型号: TPS54478RTER
厂商: Texas Instruments
文件页数: 25/38页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ 4A 16WQFN
标准包装: 3,000
系列: SWIFT™
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 0.6 V ~ 4.5 V
输入电压: 2.95 V ~ 6 V
PWM 型: 电流模式
频率 - 开关: 500kHz
电流 - 输出: 4A
同步整流器:
工作温度: -40°C ~ 150°C
安装类型: 表面贴装
封装/外壳: 16-WFQFN 裸露焊盘
包装: 带卷 (TR)
供应商设备封装: 16-WQFN 裸露焊盘(3x3)
SLVSAS2 – JUNE 2011
For this example design, a ceramic capacitor with at least a 10 V voltage rating is required to support the
maximum input voltage. For this example, one 10 μ F and one 0.1 μ F 10 V capacitors in parallel have been
selected. The input capacitance value determines the input ripple voltage of the regulator. The input voltage
ripple can be calculated using Equation 28 . Using the design example values, Ioutmax=4 A, Cin=10 μ F, Fsw=1
MHz, yields an input voltage ripple of 99 mV and a rms input ripple current of 1.95 A.
Icirms = Iout ′
Vout
Vinmin
( Vinmin - Vout )
Vinmin
(27)
vertical spacer
D Vin =
Ioutmax ′ 0.25
Cin ′ | sw
(28)
SLOW START CAPACITOR
The slow start capacitor determines the minimum amount of time it takes for the output voltage to reach its
nominal programmed value during power up. This is useful if a load requires a controlled voltage slew rate. This
is also used if the output capacitance is very large and would require large amounts of current to quickly charge
the capacitor to the output voltage level. The large currents necessary to charge the capacitor may make the
TPS54478 reach the current limit or excessive current draw from the input power supply may cause the input
voltage rail to sag. Limiting the output voltage slew rate solves both of these problems.
The slow start capacitor value can be calculated using Equation 29 . For the example circuit, the slow start time is
not too critical since the output capacitor value is 2 x 47 μ F which does not require much current to charge to 1.8
V. The example circuit has the slow start time set to an arbitrary value of 3.33 ms which requires a 10 nF
capacitor.
C6(nF) = 3 × Tss(mS)
(29)
BOOTSTRAP CAPACITOR SELECTION
A 0.1 μ F ceramic capacitor must be connected between the BOOT to PH pin for proper operation. It is
recommended to use a ceramic capacitor with X5R or better grade dielectric. The capacitor should have 10 V or
higher voltage rating.
OUTPUT VOLTAGE AND FEEDBACK RESISTORS SELECTION
For the example design, 10.0 k ? was selected for R7. Using Equation 30 , R6 is calculated as 20.0 k ? . The
nearest standard 1% resistor is 20.0 k ? .
? V OUT
?
R6 = R7 × ? - 1 ÷
è V REF ?
(30)
Due to the internal design of the TPS54478, there is a minimum output voltage limit for any given input voltage.
The output voltage can never be lower than the internal voltage reference of 0.6 V. Above 0.6 V, the output
voltage may be limited by the minimum controllable on time. The minimum output voltage in this case is given by
Voutmin = Ontimemin ′ Fsmax ′ ( Vinmax - loutmin ′ RDSmin ) - Ioutmin ′ ( RL + RDSmin )
Where:
Voutmin = minimum achievable output voltage
Ontimemin = minimum controllable on-time (100 ns typical. 120 ns no load)
Fsmax = maximum switching frequency including tolerance
Vinmax = maximum input voltage
Ioutmin = minimum load current
RDSmin = minimum high-side MOSFET on resistance (See Electrical Characteristics)
RL = series resistance of output inductor
(31)
There is also a maximum achievable output voltage which is limited by the minimum off time. The maximum
output voltage is given by Equation 32
Copyright ? 2011, Texas Instruments Incorporated
25
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