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参数资料
型号： TPS54550PWP
厂商： TEXAS INSTRUMENTS INC
元件分类： 稳压器
英文描述： 9.5 A SWITCHING REGULATOR, 700 kHz SWITCHING FREQ-MAX, PDSO16
封装： GREEN, PLASTIC, HTSSOP-16
文件页数： 15/31页
文件大小： 913K
代理商： TPS54550PWP
www.ti.com
BIAS AND BOOTSTRAP CAPACITORS
INT +
10–0.9
CO
2
(24)
C6 +
1
2pR1INT
(25)
LOW-SIDE FET
R3 +
1
pC6LC
(26)
C8 +
1
2pR1LC
(27)
ESR +
1
2pRESRCOUT
(28)
R5 +
1
2pC8 ESR
(29)
C7 +
1
8pR3CO
(30)
TPS54550
SLVS623A – MARCH 2006 – REVISED APRIL 2006
The measured overall loop response for the circuit is
Note that capacitors are only available in a limited
given in Figure 5. Note that the actual closed loop
range of standard values, so the nearest standard
crossover frequency is higher than intended at about
value has been chosen for each capacitor. The
25 kHz. This is primarily due to variation in the actual
measured closed loop response for this design is
values of the output filter components and tolerance
shown in Figure 30.
variation of the internal feedforward gain circuitry.
Overall the design has greater than 60 degrees of
phase margin and will be completely stable over all
Every
TPS54550
design
requires
a
bootstrap
combiations of line and load variability.
capacitor, C3 and a bias capacitor, C4.
The
bootstrap capacitor must be 0.1
μF. The bootstrap
Since R1 is given as 10 k
and the crossover
capacitor is located between the PH pins and BOOT
frequency is selected as 13 kHz, the desired fINT can
pin. In addition, a 24-
resistor is placed in series
be calculated with Equation 24:
with the bootstrap capacitor. This resistor is used to
slow down the leading edge of the high-side FET
turn on waveform. Using this resistor will dramatically
decrease the amplitude of the overshoot on the
And the value for C6 is given by Equation 25:
swtching node. The bias capacitor is connected
between the VBIAS pin and AGND. The value
should be 1.0
μF. Both capacitors should be
high-quality ceramic types with X7R or X5R grade
The first zero, fZ1, is located at 1/2 the output filter LC
dielectric for temperature stability. They should be
corner frequency, so R3 can be calculated from
placed as close to the device connection pins as
Equation 26:
possible.
The TPS54550 is designed to operate using an
The second zero, fZ2, is located at the output filter LC
external low-side FET, and the LSG pin provides the
corner frequency, so C8 can be calculated from
gate drive output. Connect the drain to the PH pin,
Equation 27:
the source to PGND, and the gate to LSG. The
TPS54550
gate
drive
circuitry
is
designed
to
accommodate most common n-channel FETs that
are suitable for this application. The SWIFT Designer
The first pole, fP1, is located to coincide with the
Software can be used to calculate all the design
output filter ESR zero frequency. This frequency is
parameters for low-side FET selection. There are
given by Equation 28:
some simplified guidelines that can be applied that
produce an acceptable solution in most designs.
The selected FET must meet the absolute maximum
ratings for the application:
where RESR is the equivalent series resistance of the
output capacitor.
Drain-source voltage (VDS) must be higher than the
maximum voltage at the PH pin, which is VINMAX +
In this case, the ESR zero frequency is 35.4 kHz,
0.5 V.
and R5 can be calculated from Equation 29:
Gate-source voltage (VGS) must be greater than 8 V.
Drain current (ID) must be greater than 1.1 x IOUTMAX.
The final pole is placed at a frequency above the
Drain-source on resistance (rDSON) should be as
closed loop crossover frequency high enough to not
small as possible, less than 30 m
is desirable.
cause the phase to decrease too much at the
Lower values for rDSON result in designs with higher
crossover frequency while still providing enough
efficiencies. It is important to note that the low-side
attenuation so that there is little or no gain at the
FET on time is typically longer than the high-side
switching frequency. The fP2 pole location for this
FET on time, so attention paid to low-side FET
circuit is set to 4 times the closed loop crossover
parameters can make a marked improvement in
frequency. The last compensation component value
overall efficiency.
C7 can be derived from Equation 30:
Total gate charge (Qg) must be less than 50 nC.
Again, lower Qg characteristics result in higher
efficiencies.
22
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相关代理商/技术参数
参数描述
TPS54550PWP 制造商:Texas Instruments 功能描述:PWM SWITCHER FET 6A O/P HTSSOP16 制造商:Texas Instruments 功能描述:PWM SWITCHER, FET 6A O/P, HTSSOP16 制造商:Texas Instruments 功能描述:PWM SWITCHER, FET 6A O/P, HTSSOP16; Primary Input Voltage:20V; No. of Outputs:1; Output Voltage:12V; Output Current:6A; Voltage Regulator Case Style:HTSSOP; No. of Pins:16; Operating Temperature Min:-40C; Operating Temperature ;RoHS Compliant: Yes
TPS54550PWPG4 功能描述:直流/直流开关调节器 4.5 to 20V Input 6A Step Down RoHS:否 制造商:International Rectifier 最大输入电压:21 V 开关频率:1.5 MHz 输出电压:0.5 V to 0.86 V 输出电流:4 A 输出端数量: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:PQFN 4 x 5
TPS54550PWPR 功能描述:开关变换器、稳压器与控制器 4.5 to 20V Input 6A Step Down RoHS:否 制造商:Texas Instruments 输出电压:1.2 V to 10 V 输出电流:300 mA 输出功率: 输入电压:3 V to 17 V 开关频率:1 MHz 工作温度范围: 安装风格:SMD/SMT 封装 / 箱体:WSON-8 封装:Reel
TPS54550PWPR/2801 功能描述:直流/直流开关调节器 4.5-20Vin,5A Sync SD Converter RoHS:否 制造商:International Rectifier 最大输入电压:21 V 开关频率:1.5 MHz 输出电压:0.5 V to 0.86 V 输出电流:4 A 输出端数量: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:PQFN 4 x 5
TPS54550PWPRG4 功能描述:开关变换器、稳压器与控制器 4.5 to 20V Input 6A Step Down RoHS:否 制造商:Texas Instruments 输出电压:1.2 V to 10 V 输出电流:300 mA 输出功率: 输入电压:3 V to 17 V 开关频率:1 MHz 工作温度范围: 安装风格:SMD/SMT 封装 / 箱体:WSON-8 封装:Reel
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