Output Capacitor Selection
I
RMSCout + Vout
1 *
Vout
Vin
L
1
2
3
(5)
DVout + Vout
1 *
Vout
Vin
L
1
8
Cout
)
ESR
(6)
Input Capacitor Selection
Output Voltage Selection
www.ti.com .............................................................................................................................................................. SLVS774B – JUNE 2007 – REVISED JULY 2009
Table 2. Tested Inductors (continued)
INDUCTOR
COMPONENT
DEVICE
TYPE
VALUE
SUPPLIER
2.2
H
LPS3010-222
Coilcraft
DCDC3 converter
2.2
H
LPS3015-222
Coilcraft
2.2
H
VLCF4020-2R2
TDK
The advanced Fast Response voltage mode control scheme of the inductive converters implemented in the
TPS65024x allows the use of small ceramic capacitors with a typical value of 10uF for each converter, without
having large output voltage under and overshoots during heavy load transients. Ceramic capacitors having low
ESR values have the lowest output voltage ripple and are recommended. Refer to
Table 3 for recommended
components.
If ceramic output capacitors are used, the capacitor RMS ripple current rating will always meet the application
requirements. For completeness, the RMS ripple current is calculated as:
At nominal load current the inductive converters operate in PWM mode and the overall output voltage ripple is
the sum of the voltage spike caused by the output capacitor ESR plus the voltage ripple caused by charging and
discharging the output capacitor:
Where the highest output voltage ripple occurs at the highest input voltage, Vin.
At light load currents the converters operate in Power Save Mode and output voltage ripple is dependent on the
output capacitor value. The output voltage ripple is set by the internal comparator delay and the external
capacitor. Typical output voltage ripple is less than 1% of the nominal output voltage.
Because of the nature of the buck converter having a pulsating input current, a low ESR input capacitor is
required for best input voltage filtering and minimizing interference with other circuits caused by high input
voltage spikes. Each dcdc converter requires a 10uF ceramic input capacitor on its input pin VINDCDCx. The
input capacitor can be increased without any limit for better input voltage filtering. The Vcc pin should be
separated from the input for the DC/DC converters. A filter resistor of up to 10
and a 1
F capacitor should be
used for decoupling the Vcc pin from switching noise. Note that the filter resistor may affect the UVLO threshold
since up to 3mA can flow via this resistor into the Vcc pin when all converters are running in PWM mode.
Table 3. Possible Capacitors
CAPACITOR
CASE SIZE
COMPONENT SUPPLIER
COMMENTS
VALUE
22
F
1206
TDK
C3216X5R0J226M
Ceramic
22
F
1206
Taiyo Yuden
JMK316BJ226ML
Ceramic
22
F
0805
TDK
C2012X5R0J226MT
Ceramic
22
F
0805
Taiyo Yuden
JMK212BJ226MG
Ceramic
10
F
0805
Taiyo Yuden
JMK212BJ106M
Ceramic
10
F
0805
TDK
C2012X5R0J106M
Ceramic
The DEFDCDC1, DEFDCDC2, and DEFDCDC3 pins are used to set the output voltage for each step-down
converter. See
Table 4 for the default voltages if the pins are pulled to GND or to Vcc.
Copyright 2007–2009, Texas Instruments Incorporated
21