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参数资料
| 型号： | TPS65058RGET |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 稳压器 |
| 英文描述： | 1.8 A DUAL SWITCHING CONTROLLER, 2475 kHz SWITCHING FREQ-MAX, PQCC32 |
| 封装： | 4 X 4 MM, GREEN, PLASTIC, VQFN-32 |
| 文件页数： | 23/26页 |
| 文件大小： | 1898K |
| 代理商： | TPS65058RGET |
PIN ASSIGNMENTS
12
11
10
9
8
7
1 2 3
4 5
6
18 17 16 15 14 13
19
20
21
22
23
24
FB_DCDC1
EN_DCDC1
EN_LDO1
MODE
EN_DCDC2
AGND
EN_LDO3
EN_LDO2
RESET
VLDO3
VINLDO2/3
VINLDO2
PGND1
L1
VINDCDC1/2
FB_DCDC2
L2
PGND2
V
C
V
C
VIN_LDO1
VLDO1
DEF_LDO
DEF_DCDC2
SLVS851A – MAY 2008 – REVISED SEPTEMBER 2008................................................................................................................................................... www.ti.com
RGE PACKAGE
(TOP VIEW)
TERMINAL FUNCTIONS
TERMINAL
I/O
DESCRIPTION
NAME
NO.
Power supply for digital and analog circuitry of DCDC1, DCDC2 and LDOs. This pin must be connected to the same
VCC
1, 6
I
voltage supply as VINDCDC1/2.
FB_DCDC1
19
I
Feedback input for DCDC1
Select between Power Safe Mode and forced PWM Mode for DCDC1 and DCDC2. In Power Safe Mode PFM is used
MODE
23
I
at light loads, PWM for higher loads. If PIN is set to high level, forced PWM Mode is selected. If Pin has low level,
then Device operates in Power Safe Mode.
Input voltage for VDCDC1 and VDCDC2 step-down converter. This must be connected to the same voltage supply as
VINDCDC1/2
16
I
VCC.
FB_DCDC2
13
I
Feedback input for DCDC1
L1
17
O
Switch pin of converter 1. Connected to Inductor
PGND1
18
I
GND for converter 1
PGND2
14
I
GND for converter 2
AGND
24
I
Analog GND, connect to PGND and PowerPAD
L2
15
O
Switch Pin of converter 2. Connected to Inductor.
EN_DCDC1
20
I
Enable Input for converter 1, active high
EN_DCDC2
21
I
Enable Input for converter 2, active high
VINLDO1
2
I
Input voltage for LDO1
VINLDO2/3
8
I
Input voltage for LDO2 and LDO3
VLDO1
3
O
Output voltage of LDO1
VLDO2
7
O
Output voltage of LDO2
VLDO3
9
O
Output voltage of LDO3
DEF_DCDC2
5
I
Switches output voltages at DCDC2, logic high = 1.8V, logic low = 1.2V
Switches output voltages at LDO1, logic high = 3.3V, logic low = 3.3V
DEF_LDO
4
I
Switches output voltages at LDO2, logic high = 1.8V, logic low = 1.2V
Switches output voltages at LDO3, logic high = 1.8V, logic low = 1.3V
EN_LDO1
22
I
Enable input for LDO1. Logic high enables the LDO, logic low disables the LDO.
EN_LDO2
11
I
Enable input for LDO2. Logic high enables the LDO, logic low disables the LDO.
EN_LDO3
12
I
Enable input for LDO3. Logic high enables the LDO, logic low disables the LDO.
6
Copyright 2008, Texas Instruments Incorporated
Product Folder Link(s) :TPS65058
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