参数资料
型号: TPS65530ARSLT
厂商: TEXAS INSTRUMENTS INC
元件分类: 稳压器
英文描述: 0.6 A BATTERY CHARGE CONTROLLER, 1650 kHz SWITCHING FREQ-MAX, PQCC48
封装: 6 X 6 MM, 0.40 MM PITCH, GREEN, PLASTIC, VQFN-48
文件页数: 23/32页
文件大小: 923K
代理商: TPS65530ARSLT
www.ti.com............................................................................................................................................................ SLVS835C – APRIL 2008 – REVISED APRIL 2009
TERMINAL FUNCTIONS
TERMINAL
I/O(1)
DESCRIPTION
NO.
NAME
1
SW4S
O
Buck-side terminal of coil for CH4
2
PGND4
G
GND for CH4 low-side FET
3
SW4I
I
Boost-side terminal of coil for CH4
4
VOUT4
O
Output of CH4
Output voltage feedback for CH4. The external resistors should be connected as close as possible
5
FB4
I
to the terminal.
6
ENAFE
I
Enable for CH4 (L: Disable, H: Enable)
7
XSLEEP
I
Control for sleep mode/normal operation (L: Sleep mode, H: Normal operation)
8
EN7
I
Enable for CH7 (L: Disable, H: Enable)
Soft-start time adjustment. The time is programmable by an external capacitor (see the Soft Start
9
S/S
I/O
description).
10
AGND
G
Analog ground
11
REF
O
Output of LDO. From 2.2
F to 4.7 F, capacitor should be connected to AGND.
12
VCC2
P
Power supply at CH2 buck-side FET from battery
13
SW2S
O
Buck-side terminal of coil for CH2
14
PGND2
G
GND for CH2 low-side FET
15
SW2I
I
Boost-side terminal of coil for CH2
16
VOUT2
O
Output of CH2
Output voltage feedback for CH2. The external resistors should be connected as close as possible
17
FB2
O
to the terminal.
18
VCC1
P
Power supply at CH1 high-side FET from battery
19
SW1
O
Output of CH1. The terminal should be connected to the external inductor.
20
PGND1
G
GND for CH1 low-side FET
Output voltage feedback for CH1. The external resistors should be connected as close as possible
21
FB1
I
to the terminal.
Output voltage feedback for CH3. The external resistors should be connected as close as possible
22
FB3
I
to the terminal.
23
VCC3
P
Power supply at CH3 high-side FET from battery
24
SW3
O
Output of CH3. The terminal should be connected to the external inductor.
25
PGND3
G
GND for CH3 low-side FET
Output for CH8 external low-side FET drive. The terminal is connected to the gate of the low-side
26
SW8LD
O
external FET.
Switching output for CH8 at wake mode. The terminal is switched when the output voltage of CH8
27
LL8
O
is less than 2.5 V.
Output for CH8 external high-side FET drive. The terminal is connected to the gate of the
28
SW8HD
O
high-side external FET.
29
PS
I
Power input for IC inside. The terminal should be connected to CH8 output voltage.
Output voltage feedback for CH8. The external resistors should be connected as close as possible
30
FB8
I
to the terminal.
31
FBG7/8
I
GND for CH7/8 feedback resistors
32
B-ADJ
I
Brightness adjustment for W-LED
33
FBC
I
Output current feedback for CH7
34
CIN
I
Input current at CH7 load switch
Output voltage feedback for CH7. The external resistors should be connected as close as possible
35
FBV
I
to the terminal.
36
SW7
O
Output of CH7. The terminal should be connected to the external inductor.
Power GND for CH5/7. The terminal should be connected by power ground layer at PCB via a
37
PGND5/7
G
through hole.
38
SW5
O
Low-side terminal of coil for CH5
(1)
I = input, O = output, I/O = input/output, P = power supply, G = GND
Copyright 2008–2009, Texas Instruments Incorporated
3
Product Folder Link(s): TPS65530A
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