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| 型号： | TPS75003MRHLREP |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 电源管理 |
| 英文描述： | 3-CHANNEL POWER SUPPLY SUPPORT CKT, PQCC20 |
| 封装： | 4.50 X 3.50 MM, 0.90 MM HEIGHT, PLASTIC, QFN-20 |
| 文件页数： | 10/29页 |
| 文件大小： | 1210K |
| 代理商： | TPS75003MRHLREP |
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C
= 0.01
F
SS1
m
R1 = 33 mW
C
= 0.022
F
SS1
m
R1 = 143 mW
C
= 0.022
F
SS1
m
C
= 0.01
F
SS1
m
5
OUT
F B
6
R
V
= V
+1
R
÷
è
SGLS311A
– DECEMBER 2006 – REVISED MARCH 2011
Figure 25. Effects of CSS1 and R1 on Current Ramp Limit
This soft-start current limit ramo can be used to provide inrush current control or output voltage ramp control.
While the current limit ramp can be easily understood by looking at Figure 25, the output voltage ramp is a
complex function of many variables. The dominant variables in this process are VOUT1, CSS1, IOUT1, and R1. Less
important variables are VIN1 and L1.
The best way to set a target start-up time is through bench measurement under target conditions, adjusting CSS1
to get the desired startup profile. To stay above a minimum start-up time, set the nominal start-up time to
approximately five times the minimum. To stay below a maximum time, set the nominal start-up time at one-fifth
of the maximum. Fastest start-up times occur at maximum VIN1, with minimum VOUT1, L1, COUT1, CSS1, and IOUT1.
Slowest start-up times occur under opposite conditions.
See Figure 11 to Figure 14 for characterization curves showing how the start-up profile is affected by these
critical parameters.
Output Voltage Setting Selection (Buck Controllers)
Output voltage is set using two resistors as shown for Buck2 in Figure 2. Output voltage is then calculated using
(13)
where VFB = 1.24V.
LDO OPERATION
The TPS75003 LDO uses a PMOS pass element and is offered in an adjustable version for ease of
programming to any output voltage. When used to power VCC,AUX it is set to 2.5 V; it can optionally be set to
other output voltages to power other circuitry. The LDO has integrated soft-start, independent enable, and
short-circuit and thermal protection. The LDO can be used to power VCC,AUX on the Xilinx Spartan-3 FPGA when
3.3-V JTAG signals are used as described in Application Note SLVA159 (available for download from
Input Capacitor Selection (LDO)
Although an input capacitor is not required, it is good analog design practice to connect a 0.1-
μF to 10-μF low
ESR capacitor across the input supply near the regulator. This capacitor counteracts reactive input sources and
improves transient response, stability, and ripple rejection. A higher value capacitor may be needed if large, fast
rise-time load transients are anticipated, or if the device is located far from its power source.
18
Copyright
2006–2011, Texas Instruments Incorporated
Product Folder Link(s): TPS75003-EP
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相关代理商/技术参数 |
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| TPS75003QRHLREP | 功能描述:IC PWR MGMT TRIPLE-SUPPLY 20-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 电源管理 - 专用 系列:- 应用说明:Ultrasound Imaging Systems Application Note 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:37 系列:- 应用:医疗用超声波成像，声纳 电流 - 电源:- 电源电压:2.37 V ~ 6 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:56-WFQFN 裸露焊盘 供应商设备封装:56-TQFN-EP（8x8） 包装:管件 |
| TPS75003RHLR | 功能描述:PMIC 解决方案 Integ 3-Supply Power Mngmnt IC RoHS:否 制造商:Texas Instruments 安装风格:SMD/SMT 封装 / 箱体:QFN-24 封装:Reel |
| TPS75003RHLR | 制造商:Texas Instruments 功能描述:LEADED PROCESS COMPATIBLE ((NW)) 制造商:Texas Instruments 功能描述:IC, POWER MANAGEMENT, QFN-20 |
| TPS75003RHLRG4 | 功能描述:PMIC 解决方案 Integ 3-Supply Power Mngmnt IC RoHS:否 制造商:Texas Instruments 安装风格:SMD/SMT 封装 / 箱体:QFN-24 封装:Reel |
| TPS75003RHLT | 功能描述:PMIC 解决方案 Integ 3-Supply Power Mngmnt IC RoHS:否 制造商:Texas Instruments 安装风格:SMD/SMT 封装 / 箱体:QFN-24 封装:Reel |
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