参数资料
型号: TRCV0110G
英文描述: ATM/SONET DEMULTIPLEXER|BIPOLAR|BGA|177PIN|PLASTIC
中文描述: 的ATM / SONET的分路器|双极|的BGA | 177PIN |塑料
文件页数: 17/26页
文件大小: 476K
代理商: TRCV0110G
Agere Systems Inc.
17
Data Sheet
March 28, 2002
Clock Recovery, 1:16 Data Demultiplexer
TRCV0110G 10 Gbits/s Limiting Amplifier
Electrical Characteristics
LVDS, CMOS, and CML Input and Output Pins
Table 9. LVDS dc Output Pin Characteristics
Table 10. LVDS Input Pin Characteristics
Applicable
Pins
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
D[15:0]P/N,
CKOP/N
CK622P/N
V
OH
V
OL
|V
OD
|
Output Voltage High
Output Voltage Low
Output Differential Volt-
age
Output Offset Voltage
Differential Output
Impedance
R
O
Mismatch Between
A & B
Change in V
OD
Between
Logic 0 and Logic 1
Change in V
OS
Between
Logic 0 and Logic 1
Output Current
R
LOAD
= 100
± 1%
R
LOAD
= 100
± 1%
R
LOAD
= 100
± 1%
925
250
1475
400
mV
mV
mV
V
OS
R
O
R
LOAD
= 100
± 1%
V
CM
= 1.0 V and 1.4 V
1125
80
100
1275
120
mV
R
O
V
CM
= 1.0 V and 1.4 V
20
%
|
V
OD
|
R
LOAD
= 100
± 1%
25
mV
|
Vos|
R
LOAD
= 100
± 1%
25
mV
I
SA
, I
SB
Driver shorted
to GND
Drivers shorted
together
24
mA
I
SAB
Output Current
12
mA
|I
XA
|,|I
XB
| Power-off Leakage
*
* This leakage parameter is not specified due to EDS clamp diode conducting current during forward bias test.
This voltage is measured on each P/N output.
mA
Applicable
Pins
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
REFCLKP/N
V
CM
Input Common Mode Voltage
Range
Input Peak Differential voltage
Threshold Hysteresis
*
Differential Input Impedance
Avg(V
IA
,V
IB
)
0
1200
2400
mV
V
DIFF
V
HYST
R
IN
|V
IA
– V
IB
|
(+V
ID
) – (–V
ID
)
f = 622.08 MHz
100
25
80
100
800
120
mV
mV
* Buffer will not produce output transitions when input is open-circuited.
Looser than ICORE/
IEEE
spec of ±10
.
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