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参数资料
| 型号： | TRU050-TBLHA16.384-4.096 |
| 厂商： | VECTRON INTERNATIONAL |
| 元件分类： | PLL合成/DDS/VCOs |
| 英文描述： | PHASE LOCKED LOOP, CDIP16 |
| 封装： | HERMETIC SEALED, CERAMIC, DIP-16 |
| 文件页数： | 16/17页 |
| 文件大小： | 627K |
| 代理商： | TRU050-TBLHA16.384-4.096 |
Absolute Pull Range
Absolute pull range (APR) is specified by the fourth character of the product code (see figure 26). APR is the
minimum guaranteed frequency shift from f0 over variations in temperature, aging, power supply and load. Both
frequency and environment limit the specified APR. The total pull range for the VCXO contained in the TRU-050
is typically between 200 ppm and 400 ppm. A 50 ppm APR TRU-050 fully tracks a 50 ppm source oscillator
or any other 50 ppm reference over the operating temperature range, life of the product, power supply and
measurement variations.
Output Divider Circuit
An internal 2n divided output is available at OUT2. The value of n varies from 1 to 8 and is set during
manufacture. This provides divide ratios from 2 to 256. A “no output” option may also be selected to minimize
power usage and jitter.
Divider Note: The frequency of OUT1 is the fundamental frequency of the VCXO used in the TRU-050. The
lowest frequency VCXO (OUT1) available in the TRU-050 is 12 MHz, and the highest frequency is 65.536 MHz.
Therefore, the frequency range of OUT1 is between 12 MHz and 65.536 MHz. Since OUT2 is a division of
OUT1 and can vary from OUT1 ÷ 2 to OUT1 ÷ 256, OUT2 ranges from 46.875 kHz (12 MHz ÷ 256) to
32.768 MHz (65.536 MHz ÷ 2). Lower frequency inputs may be supplied to the phase detector of the TRU-
050, but an external divider in the feedback loop is required. With an external divider in the feedback loop,
clock and data signals down to 8 kHz can be used as phase detector inputs.
Vectron International 166 Glover Avenue, Norwalk, CT 06856-5160 Tel: 1-88-VECTRON-1 e-mail: vectron@vectron.com
8 of 17
Mass-loading on the crystal generally results in a frequency decrease and is typically due to out-gassing of material within a hermetic package or from contamination by
external material in a non-hermetic package. Vectron has minimized the impact of mass loading by ensuring hermetic integrity and minimizing out-gassing by limiting the
number of internal components through the use of ASIC technology.
Under normal operating conditions with an operating temperature of 40°C, the TRU-050 will typically exhibit 2 ppm aging in the first year of operation. The device will
then exhibit 1 ppm aging the following year with a logarithmic decline each year thereafter.
I’m not familiar with APR.
Could you explain it in
more detail?
APR is the guaranteed frequency
error (in ppm) the VCXO can
track. This takes the guesswork
out of the total pull range which
drifts and is affected by
temperature, aging, power supply
etc. Every TRU-050 is tested for
pull range over the operating
temperature range, making it one
of the most reliable devices on
the market.
What’s the difference
between OUT1 and OUT2?
OUT1 is the direct output from the
VCXO and is limited to frequencies
in the 12 MHz to 65 MHz range.
OUT2 is an optional 2n divided
VCXO output. The divide ratio is
factory set at 2, 4, 8, ...or 2n,
up to 256.
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PDF描述 |
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| TRU050-GACGA33.330-16.665 | PHASE LOCKED LOOP, CDSO16 |
| TRU050-GALHA12.032-6.016 | PHASE LOCKED LOOP, CDSO16 |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| TRU050-TBLHA-1M0000000 | 制造商:VECTRON 制造商全称:Vectron International, Inc 功能描述:Complete VCXO based Phase-Locked Loop |
| TRU050-TBLHA-65M0000000 | 制造商:VECTRON 制造商全称:Vectron International, Inc 功能描述:Complete VCXO based Phase-Locked Loop |
| TRU050-TBLHB-1M0000000 | 制造商:VECTRON 制造商全称:Vectron International, Inc 功能描述:Complete VCXO based Phase-Locked Loop |
| TRU050-TBLHB-65M0000000 | 制造商:VECTRON 制造商全称:Vectron International, Inc 功能描述:Complete VCXO based Phase-Locked Loop |
| TRU050-TBLNA-1M0000000 | 制造商:VECTRON 制造商全称:Vectron International, Inc 功能描述:Complete VCXO based Phase-Locked Loop |
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