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参数资料
| 型号： | TS-MAC-PM-U4 |
| 厂商： | Lattice Semiconductor Corporation |
| 文件页数： | 45/66页 |
| 文件大小： | 0K |
| 描述： | IP CORE ETH MAC TRI-SPEED ECP2M |
| 标准包装： | 1 |
| 系列： | * |
| 其它名称： | TSMACPMU4 |
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Lattice Semiconductor
IP Core Generation and Evaluation
The following text describes the evaluation implementation flow for Windows platforms. The flow for Linux and
UNIX platforms is described in the Readme file included with the IP core.
Two example top-level reference source files are provided to support TSMAC top-level synthesis and implementa-
tion.
One top file is for a TSMAC IP core only implementation in isolation. This design is intended only to provide an
accurate indication of the device utilization associated with the TSMAC IP core itself and should not be used as an
actual implementation example.
The other top file is for the Test Application Design, and includes both the TSMAC IP core and additional loop back
test logic. This is the same top used in the functional simulation described in the previous section.
Both top-level files ts_mac_core_only_top.v (core only) and ts_mac_top.v (Application) are provided in
\< project_dir >\ts_mac_eval\< username >\src\rtl\top .
Push-button implementation of both reference designs is supported via the project files, ?
< username >_reference_eval.ldf (Diamond) or .syn (ispLEVER), and < username >_core_only_eval.ldf (Diamond) or
.syn (ispLEVER), located in ?
\< project_dir >\ts_mac_eval\< username >\impl\( synplify or precision ) .
Using Project Files With Synplify in Diamond
1. Choose File > Open > Project .
2. Browse to \< project_dir >\ts_mac_eval\< username >\impl\synplify in the Open Project dialog
box.
3. Select and open < username >_reference_eval.ldf or < username >_core_only_eval.ldf. At this point, all of the
files needed to support top-level synthesis and implementation will be imported to the project.
4. In the Diamond Toolbar, choose Project > Active Strategy >Synplify Pro Settings .
5. Set the Frequency (MHz) to 125 in the Synplify Pro pop-up window and close the window.
6. Select the device top-level entry in the left-hand GUI window.
7. Implement the complete design via the standard Diamond GUI flow.
Using Project Files With Synplify in ispLEVER
1. Choose File > Open Project .
2. Browse to \< project_dir >\ts_mac_eval\< username >\impl\synplify in the Open Project dialog
box.
3. Select and open < username >_reference_eval.syn or < username >_core_only_eval.syn. At this point, all of the
files needed to support top-level synthesis and implementation will be imported to the project.
4. Select the top-level source file in the left-hand GUI window (Sources in Project:). Right-click on the
< synthesis_tool > Synthesize Verilog File entry in the right-hand window (Process for current source:) and
select the Properties tab in the pop-up window.
5. Set the Fmax Frequency to 125 MHz in the Properties pop-up window and close the window.
6. Select the device top-level entry in the left-hand GUI window.
7. Implement the complete design via the standard ispLEVER GUI flow.
IPUG51_03.0, December 2010
45
Tri-Speed Ethernet MAC User’s Guide
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相关代理商/技术参数 |
参数描述 |
|---|---|
| TS-MAC-PM-UT4 | 功能描述:开发软件 ETHERNET MAC TRI-SPEED RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| TSMACSCU2 | 功能描述:以太网模块 TriSpd Ethernet MAC RoHS:否 制造商:Lantronix 产品:Device Servers 数据速率:300 bps to 921.6 kbps, 10 Mbps, 100 Mbps 接口类型:Ethernet, Serial 工作电源电压:5 V to 15 V 工作电源电流:133 mA to 400 mA 最大工作温度:+ 70 C |
| TS-MAC-SC-U3 | 功能描述:开发软件 Ethernet MAC TriSPD RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| TS-MAC-SC-U4 | 功能描述:开发软件 ETHERNET MAC TRI-SPEED RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| TS-MAC-SC-UT4 | 功能描述:开发软件 ETHERNET MAC TRI-SPEED RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
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