参数资料
型号: TS3405CS
厂商: Taiwan Semiconductor Co., Ltd.
英文描述: Single Synchronous Buck PWM Controller
中文描述: 单同步降压PWM控制器
文件页数: 8/10页
文件大小: 409K
代理商: TS3405CS
Application Guidelines (continued)
Output Inductor
The output inductor is selected to meet the output
voltage ripple requirements and minimize the converter’s
response time to the load transient. The inductor value
determines the converter’s ripple current and the ripple
voltage is a function of the ripple current. The ripple
voltage and current are approximated by the following
equations:
I = (Vin - Vout) / F
S
x L x (Vout / Vin)
Vout =
I x ESR
Increasing the value of inductance reduces the ripple
current and voltage. However, the large inductance
values reduce the converter’s response time to a load
transient. One of the parameters limiting the converter’s
response to a load transient is the time required to
change the inductor current. Given a sufficiently fast
control loop design, the TS3405 will provide either 0% or
100% duty cycle in response to a load transient. The
response time is the time required to slew the inductor
current from an initial current value to the transient
current level. During this interval the difference between
the inductor current and the transient current level must
be supplied by the output capacitor to minimizing the
response time can minimize the output capacitance
required.
The response time to a transient is different for the
application of load and the removal of load. The following
equations give the approximate response time interval for
application and removal of a transient load:
t
RISE
= (L x I
TRAN
) / (Vin - Vout)
t
FALL
= (L x I
TRAN
) / Vout
where:
I
TRAN
is the transient load current step
t
RISE
is the response time to the application of load
t
FALL
is the response time to the removal of load
the worst case response time can be either at the
equations at the minimum and maximum output levels for
the worst case response time.
Feedback Compensation
Fig. 6 highlights the voltage-mode control loop for a
synchronous-rectified buck converter. The output voltage
(Vout) is regulated to the reference voltage level. The
error amplifier (Error Amp) output (VE/A) is compared
with the oscillator (OSC) triangular wave to provide a
pulse-width modulated (PWM) wave with a amplitude of
Vin at the Phase node. The PWM wave is smoothed by
the output filter (Lo and Co).
The modulator transfer function is the small-signal
transfer function of Vout / V
E/A.
This function is dominated
by a DC Gain and the output filter (Lo and Co), with a
double pole break frequency at F
LC
and a zero at F
ESR.
The DC Gain of the modulator is simply the imput voltage
(Vin) divided by the peak-to-peak oscillator voltage V
OSC
.
Modulator Break Frequency Equations
F
LC
= 1 / 2
π
x
Lo x Co
F
ESR
= 1 / 2
π
x ESR x Co
Compensation Break Frequency Equations
F
Z
= 1 / 2
π
x R
2
x C
1
F
P1
= 1 / 2
π
x R
2
x [(C
1
x C
2
) / (C
1
+ C
2
)]
F
Z1
= 1 / 2
π
x (R
1
+ R
3
) x C
3
F
P2
= 1 / 2
π
x R
3
x C
3
The compensation network consists of the error amplifier
(internal to the TS3405) and the impedance networks
ZIN and ZFB. The goal of the compensation network is
to provide a closed loop transfer function with the
highest 0dB crossing frequency (f0dB) and adequate
phase margin. Phase margin is the difference between
the closed loop phase at f0dB and 180 degrees.
FIGURE 6
Voltage-mode buck converter
compensation design.
DETAILED COMPENSATION COMPONENT
FB
COMP
Reference
Vout
+
ZFD
ZIN
Lout
Driver
Driver
Vin
Phase
ESR
Vout
TS3405
_
_
+
+
_
Co
ZIN
Reference
C3
ZFD
VE/A
C2
C1
R3
R1
R2
PWM
OSC
Error AMP
TS3405
8-10
2003/12 rev. A
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