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参数资料
| 型号： | TS3A24159DGSRG4 |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 多路复用及模拟开关 |
| 英文描述： | DUAL 2-CHANNEL, SGL POLE DOUBLE THROW SWITCH, PDSO10 |
| 封装： | GREEN, PLASTIC, MSOP-10 |
| 文件页数： | 24/25页 |
| 文件大小： | 786K |
| 代理商： | TS3A24159DGSRG4 |
www.ti.com
ELECTRICAL CHARACTERISTICS FOR 1.8-V SUPPLY
(1)
0.3-
DUAL SPDT ANALOG SWITCH
DUAL-CHANNEL 2:1 MULTIPLEXER/DEMULTIPLEXER
SCDS238C – MARCH 2007 – REVISED FEBRUARY 2008
V+ = 1.65 V to 1.95 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
TA
V+
MIN
TYP
MAX
UNIT
Analog Switch
Analog signal
VCOM, VNO,
0
V+
V
range
VNC
25
°C
0.4
0.9
Peak ON
0
≤ (VNO or VNC) ≤ V+,
Switch ON,
rpeak
1.65 V
resistance
ICOM = –2 mA,
See Figure 10
Full
0.8
25
°C
0.3
0.45
ON-state
VNO or VNC = 1.5 V,
Switch ON,
ron
1.65 V
resistance
ICOM = –2 mA,
See Figure 10
Full
0.5
ON-state
25
°C
0.02
0.04
resistance match
VNO or VNC = 0.6 V, 1.5 V,
Switch ON,
Δron
1.65 V
between
ICOM = –2 mA,
See Figure 10
Full
0.05
channels
0
≤ (VNO or VNC) ≤ V+,
Switch ON,
25
°C
0.13
ON-state
ICOM = –2 mA,
See Figure 10
resistance
ron(flat)
1.65 V
25
°C
0.08
0.15
VNO or VNC = 0.6 V, 1.5 V,
Switch ON,
flatness
ICOM = –8 mA,
See Figure 10
Full
0.2
NC, NO
VNC or VNO = 0.3 V, VCOM = 1.65 V,
25
°C
–10
10
INC(OFF),
Switch OFF,
OFF leakage
or
1.95
nA
INO(OFF)
See Figure 11
Full
–50
50
current
VNC or VNO = 1.65 V, VCOM = 0.3 V,
NC, NO
VNC or VNO = 0.3 V, VCOM = Open,
25
°C
–10
10
INC(ON),
Switch ON,
ON leakage
or
1.95 V
nA
INO(ON)
See Figure 12
Full
–100
100
current
VNC or VNO = 1.65 V, VCOM = Open,
COM
VNC or VNO = Open, VCOM = 0.3 V,
25
°C
–10
10
Switch ON,
ON leakage
ICOM(ON)
or
1.95 V
nA
See Figure 12
Full
–100
100
current
VNC or VNO = Open, VCOM = 1.65 V,
Digital Control Inputs (IN1, IN2)(2)
Input logic high
VIH
Full
1
V
Input logic low
VIL
Full
0.4
V
25
°C
–40
5
40
Input leakage
IIH, IIL
VI = 1.95 V or 0
1.95 V
nA
current
Full
–50
50
(1)
The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
(2)
All unused digital inputs of the device must be held at V+ or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
8
Copyright 2007–2008, Texas Instruments Incorporated
Product Folder Link(s): TS3A24159
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