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参数资料
| 型号： | TS3L301DGVR |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 多路复用及模拟开关 |
| 英文描述： | 8-CHANNEL, DIFFERENTIAL MULTIPLEXER, PDSO48 |
| 封装： | GREEN, PLASTIC, TVSOP-48 |
| 文件页数： | 16/17页 |
| 文件大小： | 344K |
| 代理商： | TS3L301DGVR |
www.ti.com
PARAMETER MEASUREMENT INFORMATION
tPZH
tPZL
CL
(see Note A)
TEST CIRCUIT
S1
2
× VDD
Open
GND
RL
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR
≤ 10 MHz, ZO = 50 , tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
50
VG1
VDD
DUT
50
VIN
50
VG2
50
VI
TEST
RL
S1
V
CL
VDD
VI
tPLZ/tPZL
3.3 V
± 0.3 V
2
× VDD
200
GND
10 pF
0.3 V
Input Generator
VO
tPHZ/tPZH
3.3 V
± 0.3 V
GND
200
VDD
10 pF
0.3 V
VOH 0.3 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
VDD/2
Output Control
(VIN)
1.25 V
2.5 V
VOH
VOL +0.3 V
VOH
VOL
0 V
1.25 V
tPLZ
tPHZ
Output
Waveform 2
S1 at GND
(see Note B)
Output
Waveform 1
S1 at 2 y VDD
(see Note B)
VOL
16-BIT TO 8-BIT SPDT GIGABIT LAN SWITCH
WITH LOW AND FLAT ON-STATE RESISTANCE
SCDS178C – NOVEMBER 2004 – REVISED APRIL 2006
(Enable and Disable Times)
Figure 4. Test Circuit and Voltage Waveforms
8
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