- 您现在的位置：买卖IC网 > PDF目录98287 > TS8387VF 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP68 PDF资料下载
参数资料
| 型号： | TS8387VF |
| 元件分类： | ADC |
| 英文描述： | 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP68 |
| 封装： | CERAMIC, QFP-68 |
| 文件页数： | 16/38页 |
| 文件大小： | 617K |
| 代理商： | TS8387VF |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页当前第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页
TS8387
23/38
6. DEFINITION OF TERMS
(BER)
Bit error rate
Probability to exceed a specified error threshold for a sample.
(BW)
Full power input
bandwidth
The analog input frequency at which the fundamental component in the digitally
reconstructed output has fallen by 3 dB with respect to its low frequency value
(determined by FFT analysis) for input at Full Scale.
(SINAD)
Signal to noise and
distortion ratio
The ratio expressed in dB of the RMS signal amplitude, set at 1dB below Full Scale,
to the RMS sum of all other spectral components, including the harmonics except DC.
(SNR)
Signal to noise ratio
The ratio expressed in dB of the RMS signal amplitude, set at 1dB below Full Scale,
to the RMS sum of all other spectral components excluding the five first harmonics.
(THD)
Total harmonic
distorsion
The ratio expressed in dBc of the RMS sum of the first five harmonic components, to
the RMS value of the measured fundamental spectral component.
(SFDR)
Spurious free
dynamic range
The ratio expressed in dB of the RMS signal amplitude, set at 1dB below Full Scale,
to the RMS value of the next highest spectral component (peak spurious spectral com-
ponent). SFDR is the key parameter for selecting a converter to be used in a frequency
domain application ( Radar systems, digital receiver, network analyzer ....)
(ENOB)
Effective Number Of
Bits
ENOB
+
SINAD –1.76
) 20 Log A
V 2
6.02
Where A is the actual input
amplitude and V is the full scale
range of the ADC under test
(DNL)
Differential non
linearity
The Differential Non Linearity for an output code i is the difference between the mea-
sured step size of code i and the ideal LSB step size. DNL (i) is expressed in LSBs. DNL
is the maximum value of all DNL (i). DNL error specification of less than 1 LSB guaran-
tees that there are no missing output codes and that the transfer function is monotonic.
(INL)
Integral non linearity The Integral Non Linearity for an output code i is the difference between the measured
input voltage at which the transition occurs and the ideal value of this transition.
INL (i) is expressed in LSBs, and is the maximum value of all
|INL (i)|.
(DG)
Differential gain
The peak gain variation (in percent) at five different DC levels for an AC signal of 20%
Full Scale peak to peak amplitude. FIN = 5 MHz. (TBC)
(DP)
Differential phase
The peak Phase variation (in degrees) at five different DC levels for an AC signal of 20%
Full Scale peak to peak amplitude. FIN = 5 MHz. (TBC)
(TA)
Aperture delay
The delay between the rising edge of the differential clock inputs (CLK,CLKB) (zero
crossing point), and the time at which (VIN,VINB) is sampled.
(JITTER)
Aperture uncertainty The sample to sample variation in aperture delay. The voltage error due to jitter depends
on the slew rate of the signal at the sampling point.
(TS)
Settling time
Time delay to achieve 0.2 % accuracy at the converter output when a 80% Full Scale
step function is applied to the differential analog input.
(ORT)
Overvoltage recov-
ery time
Time to recover 0.2 % accuracy at the output, after a 150 % full scale step applied on
the input is reduced to midscale.
(TOD)
Output delay
The delay from the falling edge of the differential clock inputs (CLK,CLKB) (zero cross-
ing point) to the next point of change in the differential output data (zero crossing) with
specified load.
(TDR)
Data Ready output
delay
The delay from the rising edge of the differential clock inputs (CLK,CLKB) (zero crossing
point) to the rising edge of the differential Data Ready (DR,DRB) (zero crossing point)
output signal with specified load.
相关PDF资料 |
PDF描述 |
|---|---|
| TS8387MF | 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP68 |
| TS8387VF_ | 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP68 |
| TS12A4516P | 1-CHANNEL, SGL POLE SGL THROW SWITCH, PDIP8 |
| TS2007EIJT | 3 W, 1 CHANNEL, AUDIO AMPLIFIER, PBGA9 |
| TS2007EKIJT | 3 W, 1 CHANNEL, AUDIO AMPLIFIER, PBGA9 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| TS8388B | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:ADC 8-bit 1 GSPS |
| TS8388BCF | 制造商:e2v technologies 功能描述:ADC 8-BIT 1 GSPS - Trays |
| TS8388BCFS | 制造商:e2v technologies 功能描述:ADC 8-BIT 1 GSPS - Trays |
| TS8388BCG | 制造商:未知厂家 制造商全称:未知厂家 功能描述:A/D CONVERTER |
| TS8388BCGL | 制造商:e2v technologies 功能描述:ADC 8-BIT 1 GSPS - Trays |
发布紧急采购，3分钟左右您将得到回复。