
40
Rev. C - 06 March, 2001
TS80C51RA2/RD2
TS83C51RB2/RC2/RD2
TS87C51RB2/RC2/RD2
6.7. Interrupt System
The TS80C51Rx2 has a total of 7 interrupt vectors: two external interrupts (INT0 and INT1), three timer interrupts
(timers 0, 1 and 2), the serial port interrupt and the PCA global interrupt. These interrupts are shown in
Figure 16.WARNING: Note that in the first version of RC devices, the PCA interrupt is in the lowest priority. Thus the
order in INT0, TF0, INT1, TF1, RI or TI, TF2 or EXF2, PCA.
Figure 16. Interrupt Control System
Each of the interrupt sources can be individually enabled or disabled by setting or clearing a bit in the Interrupt
Enable register (See
Table 19.). This register also contains a global disable bit, which must be cleared to disable
all interrupts at once.
Each interrupt source can also be individually programmed to one out of four priority levels by setting or clearing
a bit in the Interrupt Priority register (See
Table 20.) and in the Interrupt Priority High register (See
Table 21.).shows the bit values and priority levels associated with each combination.
The PCA interrupt vector is located at address 0033H. All other vector addresses are the same as standard C52 devices.
IE1
0
3
High priority
interrupt
Interrupt
polling
sequence, decreasing
from high to low priority
Low priority
interrupt
Global Disable
Individual Enable
EXF2
TF2
TI
RI
TF0
INT0
INT1
TF1
IPH, IP
IE0
0
3
0
3
0
3
0
3
0
3
0
3
PCA IT