参数资料
型号: TS87C54X2-VCE
厂商: Atmel
文件页数: 18/62页
文件大小: 0K
描述: IC MCU 8BIT 16K OTP 40MHZ 44VQFP
标准包装: 160
系列: 87C
核心处理器: 8051
芯体尺寸: 8-位
速度: 40/30MHz
连通性: UART/USART
外围设备: POR,WDT
输入/输出数: 32
程序存储器容量: 16KB(16K x 8)
程序存储器类型: OTP
RAM 容量: 256 x 8
电压 - 电源 (Vcc/Vdd): 4.5 V ~ 5.5 V
振荡器型: 内部
工作温度: 0°C ~ 70°C
封装/外壳: 44-QFP
包装: 托盘
25
4431E–8051–04/06
AT/TS8xC54/8X2
10. Interrupt System
The TS80C54/58X2 has a total of 7 interrupt vectors: two external interrupts (INT0 and INT1),
three timer interrupts (timers 0, 1 and 2) and the serial port interrupt. These interrupts are shown
Figure 10-1. Interrupt Control System
Each of the interrupt sources can be individually enabled or disabled by setting or clearing a bit
in the Interrupt Enable register (See Table 10-2.). This register also contains a global disable bit,
which must be cleared to disable all interrupts at once.
Each interrupt source can also be individually programmed to one out of four priority levels by
setting or clearing a bit in the Interrupt Priority register (See Table 10-3.) and in the Interrupt Pri-
ority High register (See Table 10-4.). shows the bit values and priority levels associated with
each combination.
Table 10-1.
Priority Level Bit Values
A low-priority interrupt can be interrupted by a high priority interrupt, but not by another low-prior-
ity interrupt. A high-priority interrupt can’t be interrupted by any other interrupt source.
IE1
0
3
High priority
interrupt
Interrupt
polling
sequence, decreasing from
high to low priority
Low priority
interrupt
Global Disable
Individual Enable
EXF2
TF2
TI
RI
TF0
INT0
INT1
TF1
IPH, IP
IE0
0
3
0
3
0
3
0
3
0
3
IPH.x
IP.x
Interrupt Level Priority
0
0 (Lowest)
01
1
10
2
1
3 (Highest)
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