参数资料
型号: TSS463R
英文描述: Industrial Control IC
中文描述: 工业控制IC
文件页数: 24/52页
文件大小: 268K
代理商: TSS463R
TSS461C
24
Rev. D (22 Feb 01)
9.2.3. Diagnosis Control Register (0x02) :
7
6
5
4
3
2
1
0
SDC3
SDC2
SDC1
SDC0
Ma
Mb
ETIP
ESDC
Read/Write register
Default value after reset : 0
×
00.
The diagnosis is discussed in greater detail in section 8. of this chapter.
In its four high order bits the user can program the SDC rate SDC [3:0],
In its two medium order bits the diagnosis system mode is controlled : M1, M0.
In the two low order bits, the user controls if the SDC and TIP are to be generated automatically ETIP, ESDC.
SDC [3:0]
: SDC divider
The input clock is the times lot clock.
Table 5. System Diagnosis Clock Divider
SDC DIVIDER SDC [3:0]
Divide by
0000
64
0001
128
0010
256
0011
512
0100
1024
0101
2048
0110
4096
0111
8192
1000
16384
1001
32768
1010
65536
1011
131072
1100
262144
1101
524288
1110
1048576
1111
2097152
Ma, Mb
: Operating mode command bits
Table 6. Diagnosis System Command Bits
Ma
Mb
0
0
Forces the Communication on RXD0 (differen-
tial)
0
1
Forces the Communication on RXD2 (DATA)
1
0
Forces the Communication on RXD1 (DATA)
1
1
Automatic selection
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