2–9
1–7
Address
8
RW
9
ACK
1–7
Data
8
Data
9
ACK
1–7
Data
8
Data
9
ACK
P
S
SDA
SCL
Start Condition
SCL
Stop
12C Data Transfer
Figure 2–12. I2C Data Transfer Example
Data transfer rate on the bus is up to 400 kbits/s. The number of interfaces connected to the bus is dependent
on the bus capacitance limit of 400 pF. The data on the SDA line must be stable during the high period of
the clock. The high or low state of the data line can only change with the clock signal on the SCL line being
low.
Transferring multiple bytes during one read or write operation, the internal subaddress is not
automatically incremented.
A high to low transition on the SDA line while the SCL is high indicates a start condition.
A low to high transition on the SDA line while the SCL is high indicates a stop condition
Acknowledge (SDA low)
Not–Acknowledge (SDA high)
Every byte placed on the SDA line must be 8 bits long. The number of bytes that can be transferred is
unrestricted. An acknowledge bit follows each byte. If the slave can not receive another complete byte of
data until it has performed another function, it holds the clock line (SCL) low. An SCL low forces the master
into a wait state. Data transfer continues when the slave is ready for another byte of data and releases the
clock line (SCL).
Data transfer with acknowledge is necessary. The master generates an acknowledge related clock pulse.
The master releases the SDA line high during the acknowledge clock pulse. The slave pulls down the SDA
line during the acknowledge clock pulse so that it remains stable low during the high period of this clock
pulse.
When a slave does not acknowledge the slave address, the data line is left high. The master then generates
a stop condition to abort the transfer.
If a slave acknowledges the slave address, but some time later in the transfer cannot receive any more data
bytes, the master again aborts the transfer. The slave indicates a not ready condition by generating the not
acknowledge. The slave leaves the data line high and the master generates the stop condition.
If a master-receiver is involved in a transfer, it indicates the end of data to the slave-transmitter by not
generating an acknowledge on the last byte that was clocked out of the slave. The slave-transmitter must
release the data line to allow the master to generate a stop or repeated start condition.