参数资料
型号: TVP5146M2PFPR
厂商: TEXAS INSTRUMENTS INC
元件分类: 颜色信号转换
英文描述: COLOR SIGNAL DECODER, PQFP80
封装: GREEN, PLASTIC, HTQFP-80
文件页数: 83/107页
文件大小: 949K
代理商: TVP5146M2PFPR
SLES141G
– JULY 2005 – REVISED APRIL 2011
Table 2-92. VDP FIFO Interrupt Threshold Register
Subaddress
BDh
Default
80h
7
6
5
4
3
2
1
0
Threshold [7:0]
Threshold [7:0]:
This register is programmed to trigger an interrupt when the number of words in the FIFO exceeds this value.
Note: 1 word equals 2 bytes.
Table 2-93. VDP FIFO Reset Register
Subaddress
BFh
Default
00h
7
6
5
4
3
2
1
0
Reserved
FIFO reset
FIFO reset:
Writing any data to this register clears the FIFO and VDP data registers (CC, WSS/CGMS, VITC, and VPS/Gemstar). After clearing
them, this register is automatically cleared.
Table 2-94. VDP FIFO Output Control Register
Subaddress
C0h
Default
00h
7
6
5
4
3
2
1
0
Reserved
Host access
enable
Host access enable:
This register is programmed to allow the host port access to the FIFO or to allow all VDP data to go out the video output.
0 = Output FIFO data to the video output Y_[9:2] (default)
1 = Allow host port access to the FIFO data
Table 2-95. VDP Line Number Interrupt Register
Subaddress
C1h
Default
00h
7
6
5
4
3
2
1
0
Field 1 enable
Field 2 enable
Line number [5:0]
Field 1 interrupt enable:
0 = Interrupt disabled (default)
1 = Interrupt enabled
Field 2 interrupt enable:
0 = Interrupt disabled (default)
1 = Interrupt enabled
Line number [5:0]:
Interrupt line number (default 00h)
This register is programmed to trigger an interrupt when the video line number exceeds this value in bits [5:0]. This interrupt must be
enabled at address F4h.
Note: The line number value of zero or one is invalid and does not generate an interrupt.
Copyright
2005–2011, Texas Instruments Incorporated
Functional Description
77
Product Folder Link(s): TVP5146M2
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