参数资料
型号: UPA1810GR-9JG
厂商: NEC Corp.
英文描述: P-CHANNEL MOS FIELD EFFECT TRANSISTOR FOR SWITCHING
中文描述: P沟道MOS场效应晶体管开关
文件页数: 2/8页
文件大小: 62K
代理商: UPA1810GR-9JG
Data Sheet D11819EJ1V0DS00
2
μ
PA1810
ELECTRICAL CHARACTERISTICS (T
A
= 25 °C)
CHARACTERISTICS
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Zero Gate Voltage Drain Current
I
DSS
V
DS
= –12
V, V
GS
= 0
V
–10
μ
A
Gate Leakage Current
I
GSS
V
GS
= ±10
V, V
DS
= 0
V
±10
μ
A
Gate Cut-off Voltage
V
GS(off)
V
DS
= –10
V, I
D
= –1
mA
–0.5
–0.8
–1.5
V
Forward Transfer Admittance
| y
fs
|
V
DS
= –10
V, I
D
= –2.0
A
2.5
8.5
S
Drain to Source On-state Resistance
R
DS(on)1
V
GS
= –4.5
V, I
D
= –2.0
A
41
55
m
R
DS(on)2
V
GS
= –4.0
V, I
D
= –2.0
A
43
60
m
R
DS(on)3
V
GS
= –2.5
V, I
D
= –2.0
A
71
100
m
Input Capacitance
C
iss
V
DS
= –10
V
1100
pF
Output Capacitance
C
oss
V
GS
= 0
V
750
pF
Reverse Transfer Capacitance
C
rss
f = 1
MHz
240
pF
Turn-on Delay Time
t
d(on)
V
DD
= –10
V
40
ns
Rise Time
t
r
I
D
= –2.0
A
100
ns
Turn-off Delay Time
t
d(off)
V
GS(on)
= –4.0
V
90
ns
Fall Time
t
f
R
G
= 5
70
ns
Total Gate Charge
Q
G
V
DD
= –10
V
35
nC
Gate to Source Charge
Q
GS
I
D
= –4.0
A
5
nC
Gate to Drain Charge
Q
GD
V
GS
= –4.0
V
16
nC
Diode Forward Voltage
V
F(S-D)
I
F
= 4.0
A, V
GS
= 0
V
0.75
V
Reverse Recovery Time
t
rr
50
ns
Reverse Recovery Charge
Q
rr
I
F
= 4.0 A, V
GS
= 0
V
di/dt = 100 A/
μ
S
35
nC
TEST CIRCUIT 1 SWITCHING TIME
TEST CIRCUIT 2 GATE CHARGE
PG.
R
0
V
GS
D.U.T.
R
L
V
DD
τ
= 1 s
Duty Cycle
1 %
V
GS
Wave Form
D
Wave Form
V
GS
10 %
90 %
V
GS(on)
10 %
0
I
D
90 %
90 %
t
d(on)
t
r
t
d(off)
t
f
10 %
τ
R
G
= 10
I
D
0
t
on
t
off
PG.
50
D.U.T.
R
L
V
DD
I
G
= 2 mA
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