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参数资料
| 型号： | UPD31172F1-48-FN |
| 元件分类： | 外设及接口 |
| 英文描述： | MULTIFUNCTION PERIPHERAL, PBGA208 |
| 封装： | 15 X 15 MM, PLASTIC, FBGA-208 |
| 文件页数： | 5/44页 |
| 文件大小： | 279K |
| 代理商： | UPD31172F1-48-FN |
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Data Sheet U14388EJ2V0DS00
13
PD31172
1.3 External Processing of Pins and Drive Capacity
When using the VRC4172, process the pins externally, as shown in the table below.
(1/2)
Signal Name
External Processing
Drive Capacity
Tolerance
SCLK
80 pF
3 V
AD (0:24)
80 pF
3 V
DATA (0:31)
80 pF
3 V
LCDCS#
Pull up
3 V
RD#
Pull up
Note 1
80 pF
3 V
WR#
Pull up
Note 1
80 pF
3 V
LCDRDY
Pull up
40 pF
3 V
ROMCS (2:3)#
Pull up
80 pF
3 V
CKE
Pull down
80 pF
3 V
UUCAS#
Pull up
Note 1
80 pF
3 V
ULCAS#
Pull up
Note 1
80 pF
3 V
MRAS (0:1)#
Pull up
Note 1
80 pF
3 V
UCAS#
Pull up
Note 1
80 pF
3 V
LCAS#
Pull up
Note 1
80 pF
3 V
IOR#
Pull up
Note 1
3 V
IOW#
Pull up
Note 1
3 V
RESET
3 V
IOCS16#
Pull up
40 pF
3 V
IOCHRDY
Pull up
40 pF
3 V
HOLDRQ#
40 pF
3 V
HOLDAK#
Pull up
3 V
SRAS#
Pull up
Note 1
80 pF
3 V
SCAS#
Pull up
Note 1
80 pF
3 V
BUSRQ (0:1)#
3 V
BUSAK (0:1)#
40 pF
3 V
INTRP
40 pF
3 V
IRQ
40 pF
3 V
USBINT#
40 pF
3 V
PS2INT
40 pF
3 V
BUSCLK
3 V
ARBCLKSEL
3 V
DP (1:2)
Note 2
5 V
DN (1:2)
Note 2
5 V
Notes 1. The same specification has been made for these pins in the VR4121. If these pins have been processed in
the VR4121, there is no need to perform this processing in the VRC4172.
2. In full-speed mode: 50 pF, In low-speed mode: 350 pF
Remark There is no need to perform external processing if no particular external processing has been specified (
).
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