User’s Manual U14579EJ2V0UM
11
3.2.12
SUBVID (offset address: 0x2C to 0x2D) .................................................................................. 71
3.2.13
SUBID (offset address: 0x2E to 0x2F) ..................................................................................... 71
3.2.14
INTL (offset address: 0x3C) ..................................................................................................... 72
3.2.15
INTP (offset address: 0x3D)..................................................................................................... 72
3.2.16
MIN_GNT (offset address: 0x3E) ............................................................................................. 72
3.2.17
MAX_LAT (offset address: 0x3F) ............................................................................................. 73
3.2.18
BUSCNT (offset address: 0x40)............................................................................................... 73
3.2.19
IDSELNUM (offset address: 0x41) ...........................................................................................74
CHAPTER 4 DMAAU (DMA ADDRESS UNIT) .....................................................................................75
4.1
General ......................................................................................................................................75
4.2
Register Set...............................................................................................................................76
4.2.1
AIU IN DMA base address registers ........................................................................................ 77
4.2.2
AIU IN DMA address registers ................................................................................................. 78
4.2.3
AIU OUT DMA base address registers .................................................................................... 79
4.2.4
AIU OUT DMA address registers ............................................................................................. 80
CHAPTER 5 DCU (DMA CONTROL UNIT) ..........................................................................................81
5.1
General ......................................................................................................................................81
5.2
DMA Priority Control ................................................................................................................81
5.3
Register Set...............................................................................................................................81
5.3.1
DMARSTREG (base address + 0x020).................................................................................... 82
5.3.2
DMAIDLEREG (base address + 0x022)................................................................................... 82
5.3.3
DMASENREG (base address + 0x024) ................................................................................... 83
5.3.4
DMAMSKREG (base address + 0x026) ................................................................................... 84
5.3.5
DMAREQREG (base address + 0x028) ................................................................................... 85
CHAPTER 6 CMU (CLOCK MASK UNIT).............................................................................................86
6.1
General ......................................................................................................................................86
6.2
Register Set...............................................................................................................................87
6.2.1
CMUCLKMSK (base address + 0x040).................................................................................... 87
6.2.2
CMUSRST (base address + 0x042)........................................................................................ 89
CHAPTER 7 ICU (INTERRUPT CONTROL UNIT)................................................................................90
7.1
General ......................................................................................................................................90
7.2
Register Set...............................................................................................................................93
7.2.1
SYSINT1REG (base address + 0x060).................................................................................... 94
7.2.2
PIUINTREG (base address + 0x062) ....................................................................................... 96
7.2.3
AIUINTREG (base address + 0x064) ....................................................................................... 97
7.2.4
KIUINTREG (base address + 0x066) ....................................................................................... 98
7.2.5
GIULINTREG (base address + 0x068) .................................................................................... 99
7.2.6
GIUHINTREG (base address + 0x06A).................................................................................... 99