- 您现在的位置：买卖IC网 > PDF目录200645 > UPD70F3302GK-9ET 32-BIT, FLASH, 20 MHz, RISC MICROCONTROLLER, PQFP64 PDF资料下载
参数资料
| 型号： | UPD70F3302GK-9ET |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, FLASH, 20 MHz, RISC MICROCONTROLLER, PQFP64 |
| 封装： | 12 X 12 MM, PLASTIC, TQFP-64 |
| 文件页数： | 5/46页 |
| 文件大小： | 4121K |
| 代理商： | UPD70F3302GK-9ET |
第1页第2页第3页第4页当前第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页
Preliminary User’s Manual U16896EJ1V0UD
13
17.2.2
Restore .........................................................................................................................................503
17.2.3
NP flag..........................................................................................................................................504
17.3
Maskable Interrupts ................................................................................................................. 505
17.3.1
Operation......................................................................................................................................505
17.3.2
Restore .........................................................................................................................................507
17.3.3
Priorities of maskable interrupts ...................................................................................................508
17.3.4
Interrupt control register (xxlCn) ...................................................................................................512
17.3.5
Interrupt mask registers 0, 1, 3 (IMR0, IMR1, IMR3) ....................................................................514
17.3.6
In-service priority register (ISPR)..................................................................................................515
17.3.7
ID flag ...........................................................................................................................................516
17.3.8
Watchdog timer mode register 1 (WDTM1) ..................................................................................517
17.4
External Interrupt Request Input Pins (NMI, INTP0 to INTP7) ............................................. 518
17.4.1
Noise elimination ..........................................................................................................................518
17.4.2
Edge detection..............................................................................................................................520
17.5
Software Exceptions................................................................................................................ 524
17.5.1
Operation......................................................................................................................................524
17.5.2
Restore .........................................................................................................................................525
17.5.3
EP flag ..........................................................................................................................................526
17.6
Exception Trap ......................................................................................................................... 527
17.6.1
Illegal opcode ...............................................................................................................................527
17.6.2
Debug trap....................................................................................................................................529
17.7
Multiple Interrupt Servicing Control ...................................................................................... 531
17.8
Interrupt Response Time......................................................................................................... 533
17.9
Periods in Which Interrupts Are Not Acknowledged by CPU ............................................. 534
17.10 Cautions.................................................................................................................................... 534
CHAPTER 18 KEY INTERRUPT FUNCTION ......................................................................................535
18.1
Function .................................................................................................................................... 535
18.2
Register..................................................................................................................................... 536
CHAPTER 19 STANDBY FUNCTION ...................................................................................................537
19.1
Overview ................................................................................................................................... 537
19.2
Registers................................................................................................................................... 540
19.3
HALT Mode ............................................................................................................................... 543
19.3.1
Setting and operation status .........................................................................................................543
19.3.2
Releasing HALT mode .................................................................................................................543
19.4
IDLE Mode................................................................................................................................. 545
19.4.1
Setting and operation status .........................................................................................................545
19.4.2
Releasing IDLE mode...................................................................................................................545
19.5
STOP Mode ............................................................................................................................... 547
19.5.1
Setting and operation status .........................................................................................................547
19.5.2
Releasing STOP mode .................................................................................................................547
19.5.3
Securing oscillation stabilization time when STOP mode is released...........................................549
19.6
Subclock Operation Mode....................................................................................................... 550
19.6.1
Setting and operation status .........................................................................................................550
19.6.2
Releasing subclock operation mode.............................................................................................550
19.7
Sub-IDLE Mode......................................................................................................................... 552
19.7.1
Setting and operation status .........................................................................................................552
相关PDF资料 |
PDF描述 |
|---|---|
| UPD70F3302YGK-9ET | 32-BIT, FLASH, 20 MHz, RISC MICROCONTROLLER, PQFP64 |
| UPD70F3306GC-8BT | 32-BIT, FLASH, 20 MHz, RISC MICROCONTROLLER, PQFP80 |
| UPD70F3345GJ(A)-GAE-AX | 32-BIT, FLASH, 32 MHz, RISC MICROCONTROLLER, PQFP144 |
| UPD70F3357GJ(A)-GAE-AX | 32-BIT, FLASH, 32 MHz, RISC MICROCONTROLLER, PQFP144 |
| UPD70F3347GJ | 32-BIT, FLASH, 32 MHz, RISC MICROCONTROLLER, PQFP144 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| UPD70F3306GK-9EU-A | 制造商:Renesas Electronics 功能描述:V850ES 20MHz 制造商:Renesas Electronics 功能描述:V850ES 20MHz Cut Tape |
| UPD70F3306YGK-9EU-A | 制造商:Renesas Electronics Corporation 功能描述: |
| UPD70F3308GK-9EU-A | 制造商:Renesas Electronics Corporation 功能描述: |
| UPD70F3313GC-8EU-A | 制造商:Renesas Electronics Corporation 功能描述: |
| UPD70F3313YGC-8EA-A | 制造商:Renesas Electronics Corporation 功能描述: |
发布紧急采购，3分钟左右您将得到回复。