Preliminary User’s Manual U16895EJ1V0UD
10
4.3.8
Port CS ........................................................................................................................................ 110
4.3.9
Port CT ........................................................................................................................................ 112
4.3.10
Port DL......................................................................................................................................... 114
4.4
Block Diagrams ........................................................................................................................ 117
4.5
Port Register Setting When Alternate Function Is Used...................................................... 140
4.6
Cautions .................................................................................................................................... 146
4.6.1
Cautions on bit manipulation instruction for port n register (Pn) .................................................. 146
4.6.2
Hysteresis characteristics ............................................................................................................ 147
CHAPTER 5 BUS CONTROL FUNCTION .......................................................................................... 148
5.1
Features .................................................................................................................................... 148
5.2
Bus Control Pins ...................................................................................................................... 149
5.2.1
Pin status when internal ROM, internal RAM, or on-chip peripheral I/O is accessed................... 149
5.2.2
Pin status in each operation mode............................................................................................... 149
5.3
Memory Block Function .......................................................................................................... 150
5.3.1
Chip select control function.......................................................................................................... 151
5.4
Bus Access ............................................................................................................................... 152
5.4.1
Number of clocks for access........................................................................................................ 152
5.4.2
Bus size setting function .............................................................................................................. 152
5.4.3
Access by bus size ...................................................................................................................... 153
5.5
Wait Function............................................................................................................................ 160
5.5.1
Programmable wait function ........................................................................................................ 160
5.5.2
External wait function................................................................................................................... 161
5.5.3
Relationship between programmable wait and external wait ....................................................... 161
5.5.4
Programmable address wait function........................................................................................... 162
5.6
Idle State Insertion Function................................................................................................... 163
5.7
Bus Hold Function ................................................................................................................... 164
5.7.1
Functional outline......................................................................................................................... 164
5.7.2
Bus hold procedure...................................................................................................................... 165
5.7.3
Operation in power save mode .................................................................................................... 165
5.8
Bus Priority ............................................................................................................................... 166
5.9
Bus Timing................................................................................................................................ 167
5.10
Cautions .................................................................................................................................... 170
CHAPTER 6 CLOCK GENERATION FUNCTION............................................................................... 171
6.1
Overview ................................................................................................................................... 171
6.2
Configuration............................................................................................................................ 172
6.3
Registers ................................................................................................................................... 174
6.4
Operation .................................................................................................................................. 179
6.4.1
Operation of each clock ............................................................................................................... 179
6.4.2
Clock output function ................................................................................................................... 179
6.4.3
External clock input function ........................................................................................................ 179
6.5
PLL Function ............................................................................................................................ 180
6.5.1
Overview...................................................................................................................................... 180
6.5.2
Register ....................................................................................................................................... 180
6.5.3
Usage .......................................................................................................................................... 181
CHAPTER 7 16-BIT TIMER/EVENT COUNTER P (TMP)................................................................. 182